异质多晶SiGe栅应变Si NMOSFET物理模型研究

结合了“栅极工程”和“应变工程”二者的优点, 异质多晶SiGe栅应变Si MOSFET, 通过沿沟道方向使用不同功函数的多晶SiGe材料, 在应变的基础上进一步提高了MOSFET的性能. 本文结合其结构模型, 以应变Si NMOSFET为例, 建立了强反型时的准二维表面势模型, 并进一步获得了其阈值电压模型以及沟道电流的物理模型. 应用MATLAB对该器件模型进行了分析, 讨论了异质多晶SiGe栅功函数及栅长度、衬底SiGe中Ge组分等参数对器件阈值电压、沟道电流的影响, 获得了最优化的异质栅结构. 模型所得结果与仿真结果及相关文献给出的结论一致, 证明了该模型的正确性. 该研究为异质多晶SiGe栅应变Si MOSFET的设计制造提供了有价值的参考. 关键词： 异质多晶SiGe栅 应变Si NMOSFET 表面势 沟道电流     

应变Si NMOSFET漏电流解析模型

基于应变Si/SiGe器件结构,本文建立了统一的应变Si NMOSFET漏电流解析模型. 该模型采用平滑函数,实现了应变Si NMOSFET漏电流及其导数,从亚阈值区到强反型区以及从线性区到饱和区的平滑性,解决了模型的连续性问题. 同时考虑了载流子速度饱和效应和沟道长度调制效应的影响,进一步提高了模型精度. 通过将模型的仿真结果和实验结果对比分析,验证了所建模型的有效性. 该模型可为应变Si数字集成电路和模拟集成电路分析、设计提供重要参考. 关键词： 应变Si NMOSFET 漏电流 解析模型     

单轴应变SiNMOSFET源漏电流特性模型

本文在建立单轴应变Si NMOSFET迁移率模型和阈值电压模型的基础上, 基于器件不同的工作区域, 从基本的漂移扩散方程出发, 分别建立了单轴应变Si NMOSFET源漏电流模型. 其中将应力的影响显式地体现在迁移率和阈值电压模型中, 使得所建立的模型能直观地反映出源漏电流特性与应力强度的关系. 并且对于亚阈区电流模型, 基于亚阈区反型电荷, 而不是采用常用的有效沟道厚度近似的概念, 从而提高了模型的精度. 同时将所建模型的仿真结果与实验结果进行了比较, 验证了模型的可行性. 该模型已经被嵌入进电路仿真器中, 实现了对单轴应变Si MOSFET 器件和电路的模拟仿真.     

漏致势垒降低效应对短沟道应变硅金属氧化物半导体场效应管阈值电压的影响

结合应变硅金属氧化物半导体场效应管(MOSFET)结构,通过求解二维泊松方程,得到了应变Si沟道的电势分布,并据此建立了短沟道应变硅NMOSFET的阈值电压模型.依据计算结果,详细分析了弛豫Si_1－βGe_β中锗组分β、沟道长度、漏电压、衬底掺杂浓度以及沟道掺杂浓度对阈值电压的影响,从而得到漏致势垒降低效应对小尺寸应变硅器件阈值电压的影响,对应变硅器件以及电路的设计具有重要的参考价值. 关键词： 应变硅金属氧化物半导体场效应管 漏致势垒降低 二维泊松方程 阈值电压模型     

单轴应变硅N沟道金属氧化物半导体场效应晶体管电容特性模型

电容特性模型是单轴应变硅金属氧化物半导体场效应晶体管(Si MOSFET)和电路进行瞬态分析、交流小信号分析、噪声分析等的重要基础. 本文首先建立了单轴应变Si NMOSFET 的16 个微分电容模型, 并将微分电容的仿真结果与实验结果进行了比较, 验证了所建模型的正确性. 同时对其中的关键性栅电容C_gg 与应力强度、偏置电压、沟道长度、栅极掺杂浓度等的关系进行了分析研究. 结果表明, 与体硅器件相比, 应变的引入使得单轴应变Si NMOSFET器件的栅电容增大, 随偏置电压、沟道长度、栅极掺杂浓度的变化趋势保持不变.     

应变Si沟道nMOSFET阈值电压模型

在研究分析弛豫SiGe衬底上的应变Si 沟道nMOSFET纵向电势分布的基础上,建立了应变Si nMOSFET阈值电压模型,并利用该模型对不同的器件结构参数进行仿真,获得了阈值电压与SiGe层掺杂浓度和Ge组分的关系、阈值电压偏移量与SiGe层中Ge组分的关系、阈值电压与应变Si层掺杂浓度和厚度的关系. 分析结果表明：阈值电压随SiGe层中Ge组分的提高而降低,随着SiGe层的掺杂浓度的提高而增大;阈值电压随应变Si层的掺杂浓度的提高而增大,随应变Si层厚度增大而增大. 该模型为应变Si 器件阈值电压设计 关键词： 应变硅 阈值电压 电势分布 反型层     

应变Si n型金属氧化物半导体场效应晶体管电荷模型

基于应变Si/SiGe器件结构,本文建立了统一的应变Si NMOSFET电荷模型.该模型采用电荷作为状态变量,解决了电荷守恒问题.同时采用平滑函数,实现了应变Si NMOSFET端口电荷及其电容,从亚阈值区到强反型区以及从线性区到饱和区的平滑性,解决了模型的连续性问题.然后采用模拟硬件描述语言Verilog-A建立了电容模型.通过将模型的仿真结果和实验结果对比分析,验证了所建模型的有效性.该模型可为应变Si集成电路分析、设计提供重要参考.     

γ射线总剂量辐照对单轴应变Si纳米n型金属氧化物半导体场效应晶体管栅隧穿电流的影响

基于γ射线辐照条件下单轴应变Si纳米n型金属氧化物半导体场效应晶体管(NMOSFET)载流子的微观输运机制,揭示了单轴应变Si纳米NMOSFET器件电学特性随总剂量辐照的变化规律,同时基于量子机制建立了小尺寸单轴应变Si NMOSFET在γ射线辐照条件下的栅隧穿电流模型,应用Matlab对该模型进行了数值模拟仿真,探究了总剂量、器件几何结构参数、材料物理参数等对栅隧穿电流的影响.此外,通过实验进行对比,该模型仿真结果和总剂量辐照实验测试结果基本符合,从而验证了模型的可行性.本文所建模型为研究纳米级单轴应变Si NMOSFET应变集成器件可靠性及电路的应用提供了有价值的理论指导与实践基础.     

Poly-Si1-xGex栅应变SiN型金属-氧化物-半导体场效应管栅耗尽模型研究

基于对Poly-Si_1-xGe_x栅功函数的分析,通过求解Poisson方程, 获得了Poly-Si_1-xGe_x栅应变Si N型金属-氧化物-半导体场效应器件 (NMOSFET)垂直电势与电场分布模型.在此基础上,建立了考虑栅耗尽的Poly-Si_1-xGe_x栅应变Si NMOSFET的阈值电压模型和栅耗尽宽度及其归一化模型,并利用该模型,对器件几何结构参数、 物理参数尤其是Ge组分对Poly-Si_1-xGe_x栅耗尽层宽度的影响, 以及栅耗尽层宽度对器件阈值电压的影响进行了模拟分析.结果表明:多晶耗尽随Ge组分和栅掺杂浓度的增加而减弱, 随衬底掺杂浓度的增加而增强;此外,多晶耗尽程度的增强使得器件阈值电压增大. 所得结论能够为应变Si器件的设计提供理论依据.     

小尺寸应变Si nMOSFET物理模型的研究

本文运用高斯定律得出多晶SiGe栅应变Si nMOSFET的准二维阈值电压模型,并从电流密度方程出发建立了小尺寸应变Si nMOS器件的I-V特性模型.对所得模型进行计算分析,得出沟道Ge组分、多晶Si_1-yGe_y栅Ge组分、栅氧化层厚度、应变Si层厚度、栅长以及掺杂浓度对阈值电压的影响.运用二维器件模拟器对器件表面势和I-V特性进行了仿真,所得结果与模型仿真结果一致,从而证明了模型的正确性. 关键词： 多晶SiGe栅 高斯定理 阈值电压 速度过冲     

亚100 nm应变Si/SiGe nMOSFET阈值电压二维解析模型

本文基于二维泊松方程,建立了适用于亚100 nm应变Si/SiGe nMOSFET的阈值电压理论模型.为了保证该模型的准确性,同时考虑了器件尺寸减小所导致的物理效应,如短沟道效应,量子化效应等.通过将模型的计算结果与二维器件模拟器ISE的仿真结果进行对比分析,证明了本文提出的模型的正确性.最后,还讨论了亚100 nm器件中常规工艺对阈值电压的影响.该模型为亚100 nm小尺寸应变Si器件的分析设计提供了一定的参考. 关键词： 亚100nm 应变Si/SiGe nMOSFET 二维表面势 阈值电压     

Two-dimensional analytical models for asymmetric fully depleted double-gate strained silicon MOSFETs

This paper develops the simple and accurate two-dimensional analytical models for new asymmetric double-gate fully depleted strained-Si MOSFET. The models mainly include the analytical equations of the surface potential, surface electric field and threshold voltage, which are derived by solving two dimensional Poisson equation in strained-Si layer. The models are verified by numerical simulation. Besides offering the physical insight into device physics in the model, the new structure also provides the basic designing guidance for further immunity of short channel effect and drain-induced barrier-lowering of CMOS-based devices in nanometre scale.     

Analytical threshold voltage model for strained silicon GAA-TFET

Tunnel field effect transistors(TFETs) are promising devices for low power applications.An analytical threshold voltage model,based on the channel surface potential and electric field obtained by solving the 2D Poisson's equation,for strained silicon gate all around TFETs is proposed.The variation of the threshold voltage with device parameters,such as the strain(Ge mole fraction x),gate oxide thickness,gate oxide permittivity,and channel length has also been investigated.The threshold voltage model is extracted using the peak transconductance method and is verified by good agreement with the results obtained from the TCAD simulation.     

Effect of substrate doping on the flatband and threshold voltages of strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of strained-Si/SiGe p metal-oxide semiconductor field-effect transistor (pMOSFET) has been studied. By physically deriving the models of the flatband and threshold voltages, which have been validated by numerical simulation and experimental data, the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained. The proposed model can provide valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of strained-Si MOSFET.     

The effect of substrate doping on the flatband and threshold voltages of a strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of a strained-Si/SiGe p metal-oxide semiconductor field-effect transistor(pMOSFET) has been studied.By physically deriving the models of the flatband and threshold voltages,which have been validated by numerical simulation and experimental data,the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained.The proposed model can provide a valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of a strained-Si MOSFET.     

多晶SiGe栅量子阱pMOSFET阈值电压模型

本文基于多晶SiGe栅量子阱SiGe pMOSFET器件物理,考虑沟道反型时自由载流子对器件纵向电势的影响,通过求解泊松方程,建立了p+多晶SiGe栅量子阱沟道pMOS阈值电压和表面寄生沟道开启电压模型.应用MATLAB对该器件模型进行了数值分析,讨论了多晶Si_1-yGe_y栅Ge组分、Si_1-xGe_x量子阱沟道Ge组分、栅氧化层厚度、Si帽层厚度、沟道区掺杂浓度和 关键词： 多晶SiGe栅 寄生沟道 量子阱沟道 阈值电压     

Two-dimensional threshold voltage model of nanoscale silicon-on-insulator tunneling field-effect transistor

The tunneling field-effect transistor (TFET) is a potential candidate for the post-CMOS era. In this paper, a threshold voltage model is developed for this new kind of device. First, two-dimensional (2D) models are used to describe the distributions of potential and electric field in the channel and two depletion regions. Then based on the physical definition of threshold voltage for the nanoscale TFET, the threshold voltage model is developed. The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data. It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper. This threshold voltage model provides a valuable reference to the TFET device design, simulation, and fabrication.     

Two-dimensional threshold voltage model of a nanoscale silicon-on-insulator tunneling field-effect transistor

The tunneling field-effect transistor(TFET) is a potential candidate for the post-CMOS era.In this paper,a threshold voltage model is developed for this new kind of device.First,two-dimensional(2D) models are used to describe the distributions of potential and electric field in the channel and two depletion regions.Then based on the physical definition of threshold voltage for the nanoscale TFET,the threshold voltage model is developed.The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data.It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper.This threshold voltage model provides a valuable reference to TFET device design,simulation,and fabrication.