Parallel computation of complex elementary functions using quaternary signed-digit arithmetic

A variety of algorithms for computing complex elementary functions based on the quaternary signed-digit (QSD) number system are proposed. An arithmetic unit that performs parallel one-step addition (subtraction), multiplication, and division is proposed to perform the computations of elementary functions such as square root, logarithmic, exponential, and other related functions. An optoelectronic-correlator-based architecture is suggested for implementing the proposed QSD elementary function algorithms. We used the symbolic substitution technique to reduce the number of the computation rules involved.     

Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution

A higher radix based signed-digit number system, such as the quaternary signed-digit (QSD) number system, allows higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations. An optoelectronics symbolic substitution scheme to handle the parallel quaternary signed-digit (QSD) arithmetic operations is proposed. A conversion algorithm is employed on the QSD numbers to simplify the addition process and reduce the number of the optical symbolic substitution rules. The optical addition operation of two QSD numbers is performed in one-step. An efficient shared content-addressable memory (SCAM)-based optical implementation of the QSD addition/subtraction operations employs a fixed number of minterms for any operand length. The canonical QSD number addition/subtraction scheme requires a significantly reduced number of minterms when compared with a similar previously reported technique.     

One-step optical trinary signed-digit arithmetic using redundant bit representations

A simple one-step fully parallel trinary signed-digit arithmetic is proposed for parallel optical computing. This technique performs multidigit carry-free addition and borrow-free subtraction in constant time. The trinary signed-digit arithmetic operations are based on redundant bit representation of the digits. Optical implementation of the proposed arithmetic can be carried out using correlation or matrix multiplication based schemes. An efficient matrix multiplication based optical implementation that employs a fixed number of minterms for any operand length is developed. It is shown that only 30 minterms (less than recently reported techniques) are enough for implementing the one-step trinary addition and subtraction.     

Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic

A single-step optoelectronics symbolic substitution scheme to handle parallel modified signed-digit (MSD) arithmetic operations is proposed. Conversion algorithms from MSD numbers into a canonical MSD representation are provided. The canonical MSD numbers have the property that no two consecutive digits are non-zero. The addition operation of two CMSD numbers is performed in one step. It will be shown that through the use of CMSD representation, the number of symbolic substitution rules in an optical content-addressable memory (CAM) based system is significantly reduced. The number of symbolic substitution rules can be further reduced to an optimum value through a proposed shared content-addressable memory optical set-up. Further, the proposed optical scheme doubles the storage efficiency of the shared content-addressable memory.     

Trinary signed-digit arithmetic using an efficient encoding scheme

The trinary signed-digit (TSD) number system is of interest for ultrafast optoelectronic computing systems since it permits parallel carry-free addition and borrow-free subtraction of two arbitrary length numbers in constant time. In this paper, a simple coding scheme is proposed to encode the decimal number directly into the TSD form. The coding scheme enables one to perform parallel one-step TSD arithmetic operation. The proposed coding scheme uses only a 5-combination coding table instead of the 625-combination table reported recently for recoded TSD arithmetic technique.     

Modified signed-digit addition by using binary logic operations and its optoelectronic implementation

In this work, a three-step modified signed-digit (MSD) addition by using binary logic operations is proposed. Each input digit is encoded with two binary bits. Through binary logic operations, all of the weight and transfer digits and the final sum digits represented with the same encoding scheme will be generated. The operations can be performed at each digit position in parallel. In our suggested optical arithmetic and logic unit (ALU), a single electron trapping (ET) device is employed to serve as the binary logic device. This technique based on ET logic possesses the advantage of high signal-to-noise ratio (SNR). The optoelectronic system can be constructed in a simple, compact and general-purpose form.     

Polarization encoded all-optical quaternary successor with the help of SOA assisted Sagnac switch

The application of multi-valued (non-binary) signals can provide a considerable relief in transmission, storage and processing of large amount of information in digital signal processing. Optical multi-valued logical operation is an interesting challenge for future optical signal processing where we can expect much innovation. A novel all-optical quaternary successor (QSUC) circuit with the help of semiconductor optical amplifier (SOA)-assisted Sagnac switch is proposed and described. This circuit exploits the polarization properties of light. Different logical states are represented by different polarization state of light. Simulation result confirming described method is given in this paper. Proposed all-optical successor circuit can take an important and significant role in designing of all-optical quaternary universal inverter and modulo arithmetic unit (addition and multiplication).     

块多分裂方法与预条件子空间迭代方法

提出一种块多分裂并行PE迭代算法(MPPE),可以克服M^-1r^(s)并行化处理的困难。这种算法格式简单明了,收敛速度快。并证明了当矩阵A是M-阵和H-阵时,该算法是收敛的。同时把这种分裂作为预处理矩阵,对子空间方法类进行了预处理,并给出的计算实例显示该算法很有效,对子空间方法类的余量光滑和加速都起到了比较好的作用。     

One-step optical negabinary and modified signed-digit adder

A one-step algorithm for parallel negabinary addition of two negabinary numbers is achieved by minimizing the truth-table for the two-step algorithm. Without increasing the encoding cell size or adding complexity of the corresponding optical system, the proposed one-step scheme doubles the computation speed. The optical system can also be used to realize a one-step modified signed digit adder. Additionally, optical implementation of negabinary multiplication using this proposed one-step optical adder is discussed.     

负二进制编码的光学阵列化复数运算

建立一套新颖的光学负二进制并行算法体系，包括加权－移位加法、列阵乘法等。一切运算无符号位、无进位、无再编码。利用两层阵列可实现高精度的复数运算，三层阵列可实现复数矩阵－矢量运算。该算法体系非常适合于光学执行。相应地，文中给出了两层列阵复数相乘光学系统及实验结果。原理上，该算法是可级联的。     

物理量单位的智能导出算法及其应用

推导物理量的单位是物理作业中不可缺少的重要环节。提出一种物理量单位的智能导出算法,即计算机根据物理量的运算式自动推导出待求物理量的单位。实验结果表明,物理量单位导出及换算算法的结果正确,对算术运算式中的物理量单位导出及换算的正确率为100%,且物理量数值的运算正确。     

Quantum Fourier Transform-Based Arithmetic Logic Unit on a Quantum Processor

This study proposes and construct a primitive quantum arithmetic logic unit (qALU) based on the quantum Fourier transform (QFT). The qALU is capable of performing arithmetic ADD (addition) and logic NAND gate operations. It designs a scalable quantum circuit and presents the circuits for driving ADD and NAND operations on two-input and four-input quantum channels, respectively. By comparing the required number of quantum gates for serial and parallel architectures in executing arithmetic addition, it evaluates the performance. It also execute the proposed quantum Fourier transform-based qALU design on real quantum processor hardware provided by IBM. The results demonstrate that the proposed circuit can perform arithmetic and logic operations with a high success rate. Furthermore, it discusses in detail the potential implementations of the qALU circuit in the field of computer science, highlighting the possibility of constructing a soft-core processor on a quantum processing unit.     

利用改进的符号数算法和光学符号代换实现矩阵计算

本文提出了一种利用改进的符号数算法和多窗口解码光学符号代换法则实现多值矩阵计算的光学方法。并给出两个多比特改进的符号数矩阵外积计算的实验结果。这一方法具有精度高、速度快等特点。     

Terahertz optical asymmetric demultiplexer based tree-net architecture for all-optical conversion scheme from binary to its other 2n radix based form

To exploit the parallelism of optics in data processing,a suitable number system and an efficient encoding/decoding scheme for handling the data are very essential.In the field of optical computing and parallel information processing,several number systems like binary,quaternary,octal,hexadecimal,etc.have been used for different arithmetic and algebraic operations.Here,we have proposed an all-optical conversion scheme from its binary to its other 2n radix based form with the help of terahertz optical asymmetric demultiplexer (TOAD) based tree-net architecture.     

Circuit designs of ultra-fast all-optical modified signed-digit adders using semiconductor optical amplifier and Mach-Zehnder interferometer

The need for increasingly high-speed digital optical systems and optical processors demands ultra-fast all-optical logic and arithmetic units. In this paper, we combine the attractive and powerful parallelism property of the modified signed-digit (MSD) number representation with the ultra-fast all-optical switching property of the semiconductor optical amplifier and Mach-Zehnder interferometer (SOA-MZI) to design and implement all-optical MSD adder/subtracter circuits. Non-minimized and minimized techniques are presented to design and realize efficient circuits to perform arithmetic operations. Several all-optical circuits’ designs are proposed with the objective to minimize the number of the SOA-MZI switches, the time delay units in the adders, and other optical elements. To use the switching property of the SOA-MZI structure, two bits per digit binary encoding for each of the trinary MSD digits are used. The proposed optical circuits will be very helpful in developing hardware modules for optical digital computing processors.     

Method of implementing frequency-encoded NOT,OR and NOR logic operations using lithium niobate waveguide and reflecting semiconductor optical amplifiers

Optics has already proved its strong potentiality for the conduction of parallel logic, arithmetic and algebraic operations. In the last few decades several all-optical data processors were proposed. To implement these processors different data encoding/decoding techniques have been reported. In this context, polarization encoding technique, intensitybased encoding technique, tristate and quaternary logic operation, multivalued logic operations, symbolic substitution techniques etc. may be mentioned. Very recently, frequency encoding/decoding technique has drawn interest from the scientific community. Frequency is the fundamental character of any signal; and it remains unaltered in reflection, refraction, absorption etc. during the propagation and transmission of the signal. This is the most important advantage of frequency encoding technique over the conventional encoding techniques. In this communication the authors propose a new scheme for implementing NOT, OR and NOR logic operations. For this purpose co-propagating beams having different frequencies in C-band (1535–1560 nm) have been used for generating cascaded sum and difference frequency, exploiting the nonlinear response character of periodically poled LiNbO₃ waveguide. The cross-gain modulation property of the semiconductor optical amplifier (SOA) and the wavelength conversion property of the reflecting semiconductor optical amplifiers (RSOA) are exploited here to implement the desired optical logic and arithmetic operations.     

Investigation of Deuterium Substitution Effects in a Polymer Membrane Using IR Fourier Spectrometry

Since last few decades optics has already proved its strong potentiality for conducting parallel logic, arithmetic and algebraic operations due to its super-fast speed in communication and computation. So many different logical and sequential operations using all optical frequency encoding technique have been proposed by several authors. Here, we have keened out all optical dibit representation technique, which has the advantages of high speed operation as well as reducing the bit error problem. Exploiting this phenomenon, we have proposed all optical frequency encoded dibit based XOR and XNOR logic gates using the optical switches like add/drop multiplexer (ADM) and reflected semiconductor optical amplifier (RSOA). Also the operations of these gates have been verified through proper simulation using MATLAB (R2008a).     

UHV microscopy of the reconstructed Au(001) surface

We investigate the microstructure of the reconstructed Au(001) surface using ultra-high vacuum transmission electron microscopy (UHV-TEM). Bulk single crystal Au(001) surfaces were prepared via standard metallographic techniques followed by repetitive cleaning of the surface with ion milling and annealing. After a clean surface was obtained, the (001) surface was found to reconstruct into two nearly orthogonal domains of dimensions (5 × n) where n ranges between 15 and 21. The unit cell vectors of the surface cell are parallel to the 110 directions of the unreconstructed fcc (001) surface. Analysis of the diffuse scattering and dark field micrographs indicates that the surface is sheared with a complicated domain and periodicity structure which depends upon the local geometry of the substrate.     

Differential System＇s Nonlinear Behaviour of Real Nonlinear Dynamical Systems

Chaos attractor behaviour is usually preserved if the four basic arithmetic operations, i.e. addition, subtraction, multiplication, division, or their compound, are applied. First-order differential systems of one-dimensional real discrete dynamical systems and nonautonomous real continuous-time dynamical systems are also dynamical systems and their Lyapunov exponents are kept, if they are twice differentiable. These two conclusions are shown here by the definitions of dynamical system and Lyapunov exponent. Numerical simulations support our analytical results. The conclusions can apply to higher order differential systems if their corresponding order differentials exist.