Nonlinear operation of a finite-size tunnel junction between 2D electron systems

A nonlinear regime of electron tunneling into double quantum wells with independent contacts to each well is investigated theoretically. The nonlinear current–voltage response in these systems takes place when the voltageV applied to the contacts exceeds the tunneling resonance width. It is found that such a nonlinearity acquires essentially new features when the length of the tunneling area is comparable with the square root of the ratio of the averaged in-plane conductivity of the electrons to the resonance tunneling conductance. Under these conditions, the local interlayer voltagev does not coincide with V and depends on the in-plane coordinate x. The local tunneling conductance also depends on x in the nonlinear regime. This dependence creates a positive feedback, which leads to a bistable behavior of the system (two stable patterns of the local voltage at a fixed V). The bistability is reflected by Z -like regions of the current–voltage characteristics.     

Memory characteristics and tunneling mechanism of Pt nano-crystals embedded in HfAlOx films for nonvolatile flash memory devices

A non-volatile flash memory device based on metal oxide semiconductor (MOS) capacitor structure has been fabricated using platinum nano-crystals(Pt–NCs) as storage units embedded in HfAlO_x high-k tunneling layers. Its memory characteristics and tunneling mechanism are characterized by capacitance–voltage(C–V) and flat-band voltage-time(ΔV_FB-T) measurements. A 6.5 V flat-band voltage (memory window) corresponding to the stored charge density of 2.29 × 10¹³ cm⁻² and about 88% stored electron reserved after apply ±8 V program or erase voltage for 10⁵ s at high frequency of 1 MHz was demonstrated. Investigation of leakage current–voltage(J–V) indicated that defects-enhanced Pool-Frenkel tunneling plays an important role in the tunneling mechanism for the storage charges. Hence, the Pt–NCs and HfAlO_x based MOS structure has a promising application in non-volatile flash memory devices.     

Impact of proton irradiation with different fluences on the characteristics of InP/InGaAs heterostructure

ABSTRACT

The effect of traps to C–V and I–V plots of InP/InGaAs heterostructure with 3?MeV proton irradiation at different fluences has been discussed. After proton irradiation, the total reverse capacitance increases, which does not only include the variation of the depletion region width, but also the charging and discharging effect of traps. The total actual traps density N_SS of InP/InGaAs heterostructure could reach 13 orders of trap density, which is from the peak under reverse bias. The forward current is dominated by recombination current at low voltage and by the tunneling current at high voltage. The tunneling current and trap-assisted tunneling current are dominant in the reverse current.     

Current-voltage characteristics of voltage-biased Tl2Ba2CaCu2O8 intrinsic Josephson junctions

The voltage-biased current-voltage (I–V) characteristics of intrinsic Josephson junctions (IJJs), which are fabricated with misaligned high temperature superconducting Tl₂Ba₂CaCu₂O₈ (Tl-2212) thin film, are investigated experimentally. Three characteristic regions in the I–V curve are observed at 47 K. In the low voltage part, the current firstly increases and then decreases slowly with increasing the biased voltage, which is shown as a bump. In the next region, the current slightly increases with increasing the biased voltage until a sudden decrease of the current appears. Thereafter, branch structure forms with increasing the voltage on the I–V characteristic. The influence of the self-heating on the I–V characteristics is investigated and the temperature dependence of the I–V characteristics is measured to explore these characteristics in detail.     

Dark current modeling of InP based SWIR and MWIR InGaAs/GaAsSb type-II MQW photodiodes

This paper reports the dark current characteristics of SWIR and MWIR p–i–n photodiodes with type-II InGaAs/GaAsSb multiple quantum wells as the absorption region. A bulk based model with the effective band gap of the type-II quantum well structure has been used. We investigated the dark current contributing mechanisms that are limiting the electrical performance of these photodiodes. The quantitative simulation of the I–V characteristics shows that the performance of InGaAs/GaAsSb photodiodes is dominated by generation-recombination component at the temperature between 200 and 290 K for reverse biases below 5 V. Trap-assisted tunneling current and direct tunneling current begin to dominate when the reverse bias is higher than 10 V.     

Step voltage in metal/polyimide/organic molecule/polyimide/metal junction

A step structure, very similar to a Coulomb staircase, has been successfully observed in the current–voltage (I–V) characteristic of metal/polyimide (PI)/rhodamine-dendorimer (Rh-G2)/PI/metal junctions prepared by the Langmuir–Blodgett technique. Assuming Rh-G2 molecule functions like a metallic sphere and PI works as tunneling barriers, the I–V characteristic of the junctions was analyzed based on Coulomb blockade theory. Taking into account the presence of space charge at the PI-metal interface, which has been revealed by the surface potential measurement, the equation of threshold voltage of the step structure is derived. It was found that the derived equation is satisfactory to explain the I–V characteristic.     

Scanning tunneling microscope study of nanosized metal–semiconductor contacts between ErSi2 nanoislands and Si(0 0 1) substrate

The current–voltage (I–V) characteristics of the nanosized metal–semiconductor contacts formed between the epitaxially grown ErSi₂ islands and p-Si(0 0 1) substrate are measured in situ by the scanning tunneling microscope. Experimental results show that the current densities passing through the nanocontacts are five orders of magnitude larger than that of the macroscopic ones and have an obvious dependence on the contact area. Especially, it is found that I–V characteristics of the contacts are sensitive to the sample surface adsorption. Our investigations indicate that surface conduction plays an important role in the electrical transport process from ErSi₂ islands to the Si(0 0 1) substrate. Furthermore, for the nanocontacts with surface currents suppressed effectively, the ideality factor and the effective Schottky barrier height are estimated by using the standard thermionic emission model. Our analysis suggests that the current through the interface between ErSi₂ nanoislands and the p-Si(0 0 1) substrate is enhanced due to the effects of tunneling and image force lowering.     

Principal component analysis of non-uniformity in electrical characteristics of HgCdTe photodiode arrays

We present a method of analyzing the non-uniformity in electrical characteristics of HgCdTe photodiode arrays for infrared imaging applications. We have selected dynamic resistance–voltage (R–V) characteristics for analyzing electrical behavior of HgCdTe photodiodes because the dynamic resistance at a given operating voltage directly governs the imager performance and being derivative of current–voltage (I–V) characteristics, it has little impact of the constant shifts due to stray illumination during dark measurements, relaxing the stringent requirement of perfect dark conditions to some extent for performance analysis. We have demonstrated that by using statistical analysis such as correlation of the selected signatures and their principal component analysis, we can identify the root cause of the high non-uniformity among sensor pixels in the array. The method has been implemented using theoretical I–V model of MWIR HgCdTe photodiodes, but it is generic and may be implemented on any other types of diode arrays for theoretical or experimental analysis of their non-uniformity.     

Dark current-voltage characteristic of triple-junction solar cells: Their relation with the efficiency and the influence of passivating treatments

A correlation between the main parameter of a solar cell, the conversion efficiency, and its dark I–V characteristic is investigated. A formula is derived that expresses an increment (decrement) of the efficiency through a decrement (increment) of the current measured at a certain voltage (here at 2.4 V). Relationships are deduced based on which six methods for passivating the sidewalls of triple-junction InGaP/GaAs/Ge heterostructures grown by metal-organic vapor-phase epitaxy are tested to see how they influence the dark I–V characteristic. The influence of different factors, such as post-growth annealing, damaging radiation, etc., on the solar cell efficiency can be estimated by taking the dark I–V characteristic.     

Multilevel memory characteristics by light-assisted programming in floating-gate organic thin-film transistor nonvolatile memory

In this work, we study charge trapping in floating-gate organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) fabricated by a simple method. The inner discrete distribution aluminum nanoparticles (Al-Nps) and the continuous compact thin alumina film were formed to act as the floating-gate and the tunneling dielectric layer, respectively by thermally evaporated Al at a slow rate and then heat annealed in dry air. The devices exhibited remarkable photoresponse and memory effect. Compared with the unidirectional threshold voltage (V_T) shifts of memories by programming/erasing (P/E) in dark, larger bidirectional V_T shifts were obtained by light-assisted programming, and therefore the memory performances were enhanced. A multilevel memory behavior was observed in our memories, which depended on programming conditions. The charge trapping mechanisms of memories operated in dark and under illumination are discussed, respectively. The results indicate that optimal memory performance requires charge carriers of both polarities, because it is a very efficient method to enlarge the memory window and to lower the P/E voltage by overwriting trapped charges by injected charges of opposite polarity.     

Two diodes model and illumination effect on the forward and reverse bias I–V and C–V characteristics of Au/PVA (Bi-doped)/n-Si photodiode at room temperature

The forward and reverse bias current–voltage (I–V), capacitance/conductance–voltage (C/G–V) characteristics of the fabricated Au/PVA (Bi-doped)/n-Si photodiode have been investigated both in dark and under 250 W illumination intensity at room temperature. The energy density distribution profile of N_ss was extracted from the forward bias I–V measurements by taking the voltage dependence of effective barrier height (Φ_e) and R_s for photodiode both in dark and under 250 W illumination cases. The exponential growth of the N_ss from midgap toward the bottom of the conductance band is very apparent for two cases. The obtained high value of n and R_s were attributed to the particular distribution of N_ss at metal/PVA interface, surface and fabrication processes, barrier inhomogeneity of interfacial polymer layer and the form of barrier height at M/S interface. While the values of C and G/w increase R_s and R_sh decrease under illumination, due to the illumination induced electron–hole pairs in depletion region. The voltage dependent N_ss profile was also obtained from the dark and illumination capacitance at 1 MHz and these values of N_ss are in good agreement. In addition, the fill factor (FF) under 250 W illumination level was found as 28.5% and this value of FF may be accepted sufficiently high. Thus, the fabricated Au/PVA (Bi-doped)/n-Si structures are more sensitive to light, proposing them as a good candidate as a photodiode or capacitance sensor for optoelectronic applications in modern electronic industry.     

Characterization of tunnel oxide passivated contact with n-type poly-Si on p-type c-Si wafer substrate

The junction properties of tunnel silicon oxide (SiO_x) passivated contact (TOPCon) with n-type poly-Si on p-type c-Si wafer are characterized using current-voltage (J-V) and capacitance-voltage (C-V) measurements. The dark J-V curves show a standard diode characteristic with a turn-on voltage of ～0.63 V, indicating a p-n junction is formed. While the C-V curve displays an irregular shape with features of 1) a slow C increase with the decrease of the magnitude of reverse bias voltage, being used to estimate the built-in potential (V_bi), 2) a significant increase at a given positive bias voltage, corresponding to the geometric capacitance crossing the ultrathin SiO_x, and 3) a sharp decrease to negative values, resulting from the charge tunneling through the SiO_x layer. The C of depleting layer deviates from the normal linear curve in the 1/C²-V plot, which is caused by the diffusion of P dopants from the n-type poly-Si into the p-type c-Si wafer as confirmed by the electrochemical capacitance-voltage measurements. However, the 1/C^2+γ-V plots with γ > 0 leads to linear curves with a proper γ and the V_bi can still be estimated. We find that the V_bi is the range of 0.75–0.85 V, increases with the increase of the doping ratio during the poly-Si fabrication process, and correlates with the passivation quality as measured by the reverse saturated current and implied open circuit voltage extracted from transient photoconductivity decay.     

Non-Ohmic conduction in polydiacetylene thin films

We have studied the current–voltage (I–V) characteristics of polydiacetylene (PDA) thin films in the temperature region 300–1.7 K. It was found that at electric fields higher than 2 × 10⁴ V/cm, the I–V characteristics are strongly super-linear with negative temperature coefficient of starting voltage. Negative gate voltage increases the source-drain current (the effect is more pronounced at low temperature), whereas the magnetic field up to 7 T does not affect it. The results demonstrate that at low temperature the charge transport is mainly supported due to a charge injection and tunneling from the metallic banks, whereas at higher temperatures the activation energy is related to the band gap mismatch between the different polymer chains or granules.     

Coherent tunneling between elementary conducting layers in the NbSe3 charge-density-wave conductor

Characteristic features of transverse transport along the a* axis in the NbSe₃ charge-density-wave conductor are studied. At low temperatures, the I–V characteristics of both layered structures and NbSe₃-NbSe₃ point contacts exhibit a strong peak of dynamic conductivity at zero bias voltage. In addition, the I–V characteristics of layered structures exhibit a series of peaks that occur at voltages equal to multiples of the double Peierls gap. The conductivity behavior observed in the experiment resembles that reported for the interlayer tunneling in Bi-2212 high-T _c superconductors. The conductivity peak at zero bias is explained using the model of almost coherent interlayer tunneling of the charge carriers that are not condensed in the charge density wave.     

Fabrication and electrical characterization of thermally deposited amorphous Se0.82In0.18 on n-Si (100)

Amorphous (a-) Se_0.82In_0.18 thin films have been deposited onto n-type silicon (n-Si) single crystal, using the three-temperature technique, in the fabricated configuration of Au/a-Se_0.82In_0.18/n-Si/Al. The current density-voltage (J–V) characteristics have been measured at different isotherms in the range of 198–313 K, thus inspecting the conduction mechanisms comparing with Au/a-Se/n-Si/Al heterojunctions. The analysis proved that the forward bias is characterized by two parts: current increasing exponentially with the applied voltage (low voltage bias region, V<0.2 V), and non-exponentially in the higher voltage region (V>0.2 V). At the low bias region, the current was dominated by a multi-tunneling capture-emission process with a rather temperature-independent effect in the temperature range investigated. However, at the high voltage region, the effect of temperature becomes more pronounced with an ohmic character in the range of 198 to 273 K. For temperatures higher than 273 K, and below the glass transition temperature of a-Se_0.82In_0.18 (T _g～330 K), the high voltage region could be subdivided into two parts: an ohmic conduction range that limited at bias voltage of 0.20 V<V<0.46 V, and a space charge limited current region for bias voltage of V>0.46 V. The reverse J–V characteristics showed a deviation from that of the ideal diode behavior, analogous to that of pure a-Se/n-Si heterojunctions.     

Design and analysis of Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET)

In this work, a Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET) has been designed and analyzed. Various studies on III–V compound semiconductor materials for applications in TFET devices have been made and we adopt one of them to perform a physical design for boosting the tunneling probability. The GAA structure has a partially open region for extending the tunneling area and the channel is under the GAA region, which makes it an arch-shaped GAA structure. We have performed the design optimization with variables of epitaxy channel thickness (t_epi) and height of source region (H_source) in the Si-based TFET. The designed arch-shaped GAA TFET based on Si platform demonstrates excellent performances for low-power (LP) applications including on-state current (I_on) of 694 μA/μm, subthreshold swing (S) of 7.8 mV/dec, threshold voltage (V_t) of 0.1 V, current gain cut-off frequency (f_T) of 12 GHz, and maximum oscillation frequency (f_max) of 283 GHz.     

Controlling the electrical characteristics of Al/p-Si structures through Bi4Ti3O12 interfacial layer

In this study, the effects of high permittivity interfacial Bi₄Ti₃O₁₂ (BTO) layer deposition on the main electrical parameters; such as barrier height, series resistance, rectifying ratio, interface states and shunt resistance, of Al/p-Si structures are investigated using the current–voltage (I–V) and admittance measurements (capacitance–voltage, C–V and conductance–voltage, G/ω–V) at 1 MHz and room temperature. I–V characteristics revealed that, due to BTO layer deposition, series resistance values that were calculated by both Ohm's law and Cheung's method decreased whereas shunt resistance values increased. Therefore, leakage current value decreased significantly by almost 35 times as a result of high permittivity interfacial BTO layer. Moreover, rectifying ratio was improved through BTO interfacial layer deposition. I–V data indicated that high permittivity interfacial BTO layer also led to an increase in barrier height. Same result was also obtained through C–V data. Obtained results showed that the performance of the device is considerably dependent on high permittivity BTO interfacial layer.     

STM observation of Coulomb staircase behavior through C60 clusters

Two samples of C60 clusters were prepared on highly oriented pyrolytic graphite (HOPG) substrate by thermal evaporation. One is ∼1 nm and the other is ∼15 nm in radius. The current flowing across C60 clusters was measured using scanning tunneling microscope in atmosphere at room temperature. Coulomb staircase behavior was successively observed in the current–voltage (I–V) characteristics. Interestingly, the capacitances between HOPG and C60 clusters, estimated from the I–V characteristics, were almost the same between these two samples. We discussed this result taking into account the relaxation and localization time of electrons injected into C60 clusters.     

Optical and current transport properties of CuO/ZnO nanocoral p–n heterostructure hydrothermally synthesized at low temperature

We demonstrate the synthesis and investigate the electrical and optical characteristics of ‘nanocorals’ (NCs) composed of CuO/ZnO grown at low temperature through the hydrothermal approach. High-density CuO nanostructures (NSs) were selectively grown on ZnO nanorods (NRs). The synthesized NCs were used to fabricate p–n heterojunctions that were investigated by the current density–voltage (J–V) and the capacitance–voltage (C–V) techniques. It was found that the NC heterojunctions exhibit a well-defined diode behavior with a threshold voltage of about 1.52 V and relatively high rectification factor of ～760. The detailed forward J–V characteristics revealed that the current transport is controlled by an ohmic behavior for V≤0.15 V, whereas at moderate voltages 1.46≤V<1.5 the current follows a J? α?exp(βV) relationship. At higher voltages (≥1.5 V) the current follows the relation J? α? V ², indicating that the space-charge-limited current mechanism is the dominant current transport. The C–V measurement indicated that the NC diode has an abrupt junction. The grown CuO/ZnO NCs exhibited a broad light absorption range that is covering the UV and the entire visible parts of the spectrum.