Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution

A higher radix based signed-digit number system, such as the quaternary signed-digit (QSD) number system, allows higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations. An optoelectronics symbolic substitution scheme to handle the parallel quaternary signed-digit (QSD) arithmetic operations is proposed. A conversion algorithm is employed on the QSD numbers to simplify the addition process and reduce the number of the optical symbolic substitution rules. The optical addition operation of two QSD numbers is performed in one-step. An efficient shared content-addressable memory (SCAM)-based optical implementation of the QSD addition/subtraction operations employs a fixed number of minterms for any operand length. The canonical QSD number addition/subtraction scheme requires a significantly reduced number of minterms when compared with a similar previously reported technique.     

Parallel quaternary signed-digit arithmetic operations: addition, subtraction, multiplication and division

A quaternary signed-digit number representations-based arithmetic unit is proposed. The arithmetic unit performs parallel one-step addition (subtraction), multiplication and division. We use the symbolic substitution technique to reduce the number of the computation rules involved in the computation rules. Fast parallel nonrecoded quaternary signed-digit multiplication is proposed using our proposed one-step quaternary signed-digit adder. Also, parallel quaternary signed-digit division is performed in constant time by exploiting an iterative conversion algorithm where in every iterative step a negation operation, an addition operation and two multiplication operations are performed. The execution times of the proposed QSD operations are proportional to log₂ n, where n are the length of operands.     

Optical implementation of an efficient modified signed-digit trinary addition

Efficient parallel schemes for carry-propagation-free addition of modified signed-digit trinary numbers are presented. The necessary minterms for implementation using an optical programmable logic array area are derived. The proposed schemes require only a truth table of 25 entries compared with an earlier scheme of 625 entries. The proposed schemes are amenable to optical implementation. Experimental results using an optical programmable logic array are demonstrated. The experiments show the problems of noise and crosstalk. This suggests some dc bias is necessary to increase the signal-to-noise ratio of the optical circuit.     

Trinary signed-digit arithmetic using an efficient encoding scheme

The trinary signed-digit (TSD) number system is of interest for ultrafast optoelectronic computing systems since it permits parallel carry-free addition and borrow-free subtraction of two arbitrary length numbers in constant time. In this paper, a simple coding scheme is proposed to encode the decimal number directly into the TSD form. The coding scheme enables one to perform parallel one-step TSD arithmetic operation. The proposed coding scheme uses only a 5-combination coding table instead of the 625-combination table reported recently for recoded TSD arithmetic technique.     

Parallel computation of complex elementary functions using quaternary signed-digit arithmetic

A variety of algorithms for computing complex elementary functions based on the quaternary signed-digit (QSD) number system are proposed. An arithmetic unit that performs parallel one-step addition (subtraction), multiplication, and division is proposed to perform the computations of elementary functions such as square root, logarithmic, exponential, and other related functions. An optoelectronic-correlator-based architecture is suggested for implementing the proposed QSD elementary function algorithms. We used the symbolic substitution technique to reduce the number of the computation rules involved.     

Modified signed-digit trinary addition using synthetic wavelet filter

The modified signed-digit (MSD) number system has been a topic of interest as it allows for parallel carry-free addition of two numbers for digital optical computing. In this paper, harmonic wavelet joint transform (HWJT)-based correlation technique is introduced for optical implementation of MSD trinary adder implementation. The realization of the carry-propagation-free addition of MSD trinary numerals is demonstrated using synthetic HWJT correlator model. It is also shown that the proposed synthetic wavelet filter-based correlator shows high performance in logic processing. Simulation results are presented to validate the performance of the proposed technique.     

One-step optical negabinary and modified signed-digit adder

A one-step algorithm for parallel negabinary addition of two negabinary numbers is achieved by minimizing the truth-table for the two-step algorithm. Without increasing the encoding cell size or adding complexity of the corresponding optical system, the proposed one-step scheme doubles the computation speed. The optical system can also be used to realize a one-step modified signed digit adder. Additionally, optical implementation of negabinary multiplication using this proposed one-step optical adder is discussed.     

Circuit designs of ultra-fast all-optical modified signed-digit adders using semiconductor optical amplifier and Mach-Zehnder interferometer

The need for increasingly high-speed digital optical systems and optical processors demands ultra-fast all-optical logic and arithmetic units. In this paper, we combine the attractive and powerful parallelism property of the modified signed-digit (MSD) number representation with the ultra-fast all-optical switching property of the semiconductor optical amplifier and Mach-Zehnder interferometer (SOA-MZI) to design and implement all-optical MSD adder/subtracter circuits. Non-minimized and minimized techniques are presented to design and realize efficient circuits to perform arithmetic operations. Several all-optical circuits’ designs are proposed with the objective to minimize the number of the SOA-MZI switches, the time delay units in the adders, and other optical elements. To use the switching property of the SOA-MZI structure, two bits per digit binary encoding for each of the trinary MSD digits are used. The proposed optical circuits will be very helpful in developing hardware modules for optical digital computing processors.     

Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic

A single-step optoelectronics symbolic substitution scheme to handle parallel modified signed-digit (MSD) arithmetic operations is proposed. Conversion algorithms from MSD numbers into a canonical MSD representation are provided. The canonical MSD numbers have the property that no two consecutive digits are non-zero. The addition operation of two CMSD numbers is performed in one step. It will be shown that through the use of CMSD representation, the number of symbolic substitution rules in an optical content-addressable memory (CAM) based system is significantly reduced. The number of symbolic substitution rules can be further reduced to an optimum value through a proposed shared content-addressable memory optical set-up. Further, the proposed optical scheme doubles the storage efficiency of the shared content-addressable memory.     

Ultra-fast all-optical polarization-encoded modified signed-digit addition using terahertz-optical-asymmetric-demultiplexer (TOAD) switches

In this paper, enhanced designs for ultra-fast all-optical circuits based on the terahertz-optical-asymmetric-demultiplexer (TOAD) adders are proposed. The high speed is achieved due to the use of the nonlinear optical materials and the nonbinary modified signed-digit (MSD) number representation. The proposed all-optical circuits use polarized light to present the trinary digits of the MSD numbers. It will be shown that the polarization-encoded MSD adder uses much less TOADs switches (37.5% less) and it is faster by 33.33% compared to the intensity-encoded ones.     

利用改进的符号数算法和光学符号代换实现矩阵计算

本文提出了一种利用改进的符号数算法和多窗口解码光学符号代换法则实现多值矩阵计算的光学方法。并给出两个多比特改进的符号数矩阵外积计算的实验结果。这一方法具有精度高、速度快等特点。     

All-optical negabinary adders using Mach–Zehnder interferometer

In contrast to optoelectronics, all-optical adders are proposed where all-optical signals are used to represent the input numbers and the control signals. In addition, the all-optical adders use the negabinary modified signed-digit number representation (an extension of the negabinary number system) to represent the input digits. Further, the ultra-speed of the designed circuits is achieved due to the use of ultra-fast all-optical switching property of the semiconductor optical amplifier and Mach–Zehnder interferometer (SOA–MZI). Furthermore, two-bit per digit binary encoding scheme is employed to represent the trinary values of the negabinary modified signed-digits.     

All-optical conversion scheme from binary to its MTN form with the help of nonlinear material based tree-net architecture

In the field of optical computing and parallel information processing, several number systems have been used for different arithmetic and algebraic operations. Therefore an efficient conversion scheme from one number system to another is very important. Modified trinary number (MTN) has already taken a significant role towards carry and borrow free arithmetic operations. In this communication, we propose a tree-net architecture based all optical conversion scheme from binary number to its MTN form. Optical switch using nonlinear material (NLM) plays an important role.     

Modified signed-digit addition by using binary logic operations and its optoelectronic implementation

In this work, a three-step modified signed-digit (MSD) addition by using binary logic operations is proposed. Each input digit is encoded with two binary bits. Through binary logic operations, all of the weight and transfer digits and the final sum digits represented with the same encoding scheme will be generated. The operations can be performed at each digit position in parallel. In our suggested optical arithmetic and logic unit (ALU), a single electron trapping (ET) device is employed to serve as the binary logic device. This technique based on ET logic possesses the advantage of high signal-to-noise ratio (SNR). The optoelectronic system can be constructed in a simple, compact and general-purpose form.     

Optical binary logic gate-based modified signed-digit arithmetic

A new design approach for a three-step modified signed-digit (MSD) adder is presented that can be optically implemented using binary logic gates. The proposed scheme depends on encoding each MSD digits into a pair of binary digits using a two-state and multi-position encoding scheme. The proposed design algorithm depends on constructing the addition truth table of binary-coded MSD numbers and then using Karnaugh map to achieve output minimization. The optical binary logic gates are obtained by simply programming the decoding masks of a shadow-casting-based optical logic gate system. The proposed scheme results in a simple, compact, and efficient optical binary gate-based parallel addition system.     

Unified negabinary symbolic arithmetic for addition and subtraction with polarization-encoded optical shadow casting

Conventional algorithms process addition and subtraction in different ways. In this paper, by introducing bipolar carries, a unified negabinary symbolic arithmetic for the two operations can be derived, using only the same six substitution rules. Based on the polarization-encoded optical shadow-casting technique, the encoding and decoding patterns for half-addition, half-subtraction and unified arithmetic are designed, with the fixed LED pattern and separate and simultaneous generation of the multi-outputs. The architecture is simple, programmable, cost-efficient, and the addition and subtraction of multiple pairs of bipolar numbers can be handled in parallel in the same manner.     

Trinary arithmetic and logic unit (TALU) using savart plate and spatial light modulator (SLM) suitable for optical computation in multivalued logic

Arithmetic logic unit (ALU) is the most important unit in any computing system. Optical computing is becoming popular day-by-day because of its ultrahigh processing speed and huge data handling capability. Obviously for the fast processing we need the optical TALU compatible with the multivalued logic. In this regard we are communicating the trinary arithmetic and logic unit (TALU) in modified trinary number (MTN) system, which is suitable for the optical computation and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.     

基于正交化算法的三值互连神经网络模型

提出了以信息损失最少为原则的三值(±1)互连权重编码方法，这种编码方法比以前的三值权重编码方法显著地提高了神经网络的性能。由于互连权重只有三值，恰恰弥补了光互连精度不高的缺点，易于光学实现。     

Symbolic substitution based flagged arithmetic unit design using polarization-encoded optical shadow-casting system

An extremely efficient modified-signed digit arithmetic unit based on symbolic substitution scheme is designed using the polarization-encoded optical shadow-casting system. Alternate design characteristics for both addition and subtraction are also presented.     

负二进制编码的光学阵列化复数运算

建立一套新颖的光学负二进制并行算法体系，包括加权－移位加法、列阵乘法等。一切运算无符号位、无进位、无再编码。利用两层阵列可实现高精度的复数运算，三层阵列可实现复数矩阵－矢量运算。该算法体系非常适合于光学执行。相应地，文中给出了两层列阵复数相乘光学系统及实验结果。原理上，该算法是可级联的。