| 基于FPGA的CAN控制器软核的设计与实现 |
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| 引用本文： | 吴从中,潘玉静,田中华. 基于FPGA的CAN控制器软核的设计与实现[J]. 电路与系统学报, 2011, 16(3): 118-122 |
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| 作者姓名： | 吴从中 潘玉静 田中华 |
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| 作者单位： | 合肥工业大学计算机与信息学院;中海油西江油田; |
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| 摘 要： | 本文参照CAN2.0总线协议设计了一个CAN控制器软核。具体设计采用TOP-DOWN方式,上层采用模块化设计,最底层模块以Verilog语言编写而成。测试了软核在Xilinx公司和Altera公司部分FPGA上的资源利用和性能情况。此外,基于SOPC技术将处理器软核和CAN控制器软核集成在单片FPGA中,构建了一种新型的CAN总线系统,并在该系统中完成了对控制器软核的测试验证。
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| 关 键 词： | CAN2.0总线协议 软核 FPGA CAN总线系统 |
Design and implementation of a CAN Controller Soft Core based on FPGA |
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| WU Cong-zhong,PAN Yu-jing,TIAN Zhong-hua. Design and implementation of a CAN Controller Soft Core based on FPGA[J]. Journal of Circuits and Systems, 2011, 16(3): 118-122 |
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| Authors: | WU Cong-zhong PAN Yu-jing TIAN Zhong-hua |
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| Affiliation: | WU Cong-zhong1,PAN Yu-jing1,TIAN Zhong-hua2(1.School of Computer and Information,Hefei University of Technology.Hefei 230009,China,2.Xijiang Oil Field of CNOOC,Shenzhen 518067,China) |
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| Abstract: | This paper presents a CAN controller soft core based on CAN2.0 bus protocol.We use TOP-DOWN style to design the soft core.The upper level adopts modular design method,and the bottom one is described by Verilog language.The soft core is implemented on Xilinx and Altera's FPGA to test resource utilization and performance.Besides,a new CAN bus system based on SOPC technology is built by integrating a microprocessor and the CAN soft core into a FPGA chip.The test of the soft core is completed in the system as w... |
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| Keywords: | CAN2.0 bus protocol soft core FPGA CAN bus system |
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