| 光纤通信用低相位抖动时钟数据恢复电路 |
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| 引用本文： | 陈杰生,来新泉,郭晓峰.光纤通信用低相位抖动时钟数据恢复电路[J].光通信研究,2006,32(3):15-18,57. |
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| 作者姓名： | 陈杰生 来新泉 郭晓峰 |
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| 作者单位： | 西安电子科技大学,电路CAD研究所,陕西,西安,710071 |
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| 摘 要： | 文章阐述了一种适用于光纤通信的锁相环(PLL)时钟数据恢复电路结构.该结构采用负阻放大形式构成二阶有源低通滤波器,并用PECL环形延时单元构成压控振荡器(VCO),工作在80 ～500 MHz的频率范围内,峰-峰相位抖动＜20 ps,锁定时间＜600 ns.实际电路在计算机上仿真成功,版图后仿真验证也已通过,并进行了投片.
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| 关 键 词： | 时钟数据恢复 低通滤波 锁相环 非归零 |
| 文章编号： | 1005-8788（2006）03-0015-04 |
| 收稿时间： | 2005-08-19 |
| 修稿时间： | 2005-08-19 |
A high-speed and low-jitter CDR circuit for fiber-optic communications |
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| CHEN Jiesheng,LAI Xinquan,GUO Xiaofeng.A high-speed and low-jitter CDR circuit for fiber-optic communications[J].Study on Optical Communications,2006,32(3):15-18,57. |
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| Authors: | CHEN Jiesheng LAI Xinquan GUO Xiaofeng |
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| Abstract: | A low-jitter PLL CDR circuit for fiber-optic communications is introduced, which adopts a second-order active LP filter using negative-impedance amplification and forms a VCO with PECL ring time-delay elements, operating within the range of 80～500 MHz with the peak-peak jitter ＜20 ps and the phase-lock time ＜600 ns. Both pre- and post-layout simulations of the actual circuit prove to be successful. |
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| Keywords: | CDR low-pass filter PLL NZR |
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