| 基于802.11a的FFT/IFFT处理器设计 |
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| 引用本文： | 吴斌,姜鑫,周玉梅.基于802.11a的FFT/IFFT处理器设计[J].微电子学与计算机,2011,28(4):61-64. |
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| 作者姓名： | 吴斌 姜鑫 周玉梅 |
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| 作者单位： | 1. 中国科学院,微电子研究所,北京,100029
2. 中国科学院,微电子研究所,北京,100029;电子科技大学电子工程学院,四川,成都,610054 |
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| 基金项目： | "新一代宽带无线移动通信网"国家科技重大专项项目 |
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| 摘 要： | 设计了一种应用于802.11a的64点FFT/IFFT处理器.采用单蝶形4路并行结构,提出了4路并行无冲突地址产生方法,有效地提高了吞吐率,完成64点FFT/IFFT运算只需63个时钟周期.提出的RAM双乒乓结构实现了对输入和输出均为连续数据流的缓存处理.不仅能实现64点FFT和IFFT,而且位宽可以根据系统任意配置.为了提高数据运算的精度,设计采用了块浮点算法,实现了精度与资源的折中.16位位宽时,在HJTC 0.18μmCMOS工艺下综合,内核面积为:0.626 7 mm2,芯片面积为:1.35 mm×1.27 mm,最高工作频率可达300 MHz,功耗为126.17 mW.
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| 关 键 词： | FFT IFFT 块浮点 并行无冲突地址 |
Design of a FFT/IFFT Processor for 802.11a |
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| WU Bin,JIANG Xin,ZHOU Yu-mei.Design of a FFT/IFFT Processor for 802.11a[J].Microelectronics & Computer,2011,28(4):61-64. |
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| Authors: | WU Bin JIANG Xin ZHOU Yu-mei |
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| Institution: | WU Bin1,JIANG Xin1,2,ZHOU Yu-mei1(1 Institute of Microelectronics,Chinese Academy of Science,Beijing 100029,China,2 School of Electronic Engineering,University of Electronic Science and Technology of China,Chengdu 610054,China) |
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| Abstract: | In this paper,we present a 64 point FFT/IFFT processer developed primarily for the application in a OFDM based IEEE 802.11a WLAN baseband processor.The proposed processor uses the four-parallel architecture of single butterfly to efficiently improve throughput,and requires only 63 clock cycles for a 64 points FFT/IFFT.Double PingPang architecture is proposed to perform storage of both input and output streaming data.The proposed processor not only supports the operation of FFT/IFFT in 64 points but can also... |
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| Keywords: | FFT IFFT |
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