基于FPGA的千兆以太网数据传输的设计与实现

为了解决大数据量长距离传输的稳定性和传输速率的问题,采用复杂可编程芯片FPGA设计出千兆以太网传输系统。为了简化设计,采用MAC+PHY方法实现以太网帧的封装及传输,MAC采用Virtex-4的嵌入式以太网IP核实现,PHY采用MARVELL公司的88E1111芯片实现,两芯片接口采用GMII连接模式。实验仿真结果表明,该传输系统能支持1 000 Mbit/s传输速率,该设计方案是可行的,有一定的实用价值。

Design and implementation for Gigabit Ethernet data transmission based on FPGA

In order to solve the stability and transmission rate problems during the long-distance transmission of large amounts of data, use the complex programmable-chip FPGA to design the Gigabit Ethernet transmission system. To simplify the design, we use MAC + PHY strategy to achieve the Ethernet frame transmission, using Virtex-4 embedded Ethernet IP core to act as MAC, using 88E1111 chip act as PHY ,the two-chip connected with GMII interface. The results show that the transmission system can support 1000Mbps transfer rates, this design is feasible, and has certain practical value.