| 65nm下低功耗稳定性高的寄存器堆的设计 |
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| 引用本文： | 张星星,李毅,熊保玉,韩军,张跃军,董方圆,张章,虞志益,程旭,曾晓洋.65nm下低功耗稳定性高的寄存器堆的设计[J].半导体学报,2012,33(3):035010-5. |
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| 作者姓名： | 张星星 李毅 熊保玉 韩军 张跃军 董方圆 张章 虞志益 程旭 曾晓洋 |
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| 作者单位： | 复旦大学,复旦大学 |
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| 基金项目： | 国家科技重大专项– 01 Special 2010ZX01030-001-001-03 |
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| 摘 要： | 本文详细分析了低功耗稳定性高的32x32, 4读2写的寄存器堆，提出了采用MUX和锁存器的输出结构。该输出结构没有任何动态或模拟电路，提高了鲁棒性的同时降低了功耗。简化的时序不仅降低了功耗，而且增强了鲁棒性。连续读“0”或“1”的时候，这种结构能够消耗更小的功耗。该寄存器堆已在65nm下流片，芯片测试结果显示，它1.2V电源电压下，工作频率为0.8GHZ，消耗功耗7.2mW。
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| 关 键 词： | 寄存器堆 65nm 多端口 稳定性高 低功耗 |
| 收稿时间： | 9/8/2011 7:25:42 PM |
Robust and low power register file in 65 nm technology |
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| Zhang Xingxing,Li Yi,Xiong Baoyu,Han Jun,Zhang Yuejun,Dong Fangyuan,Zhang Zhang,Yu Zhiyi,Cheng Xu and Zeng Xiaoyang.Robust and low power register file in 65 nm technology[J].Chinese Journal of Semiconductors,2012,33(3):035010-5. |
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| Authors: | Zhang Xingxing Li Yi Xiong Baoyu Han Jun Zhang Yuejun Dong Fangyuan Zhang Zhang Yu Zhiyi Cheng Xu and Zeng Xiaoyang |
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| Institution: | State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei 230009, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China |
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| Abstract: | |
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| Keywords: | register file 65 nm robust low power multi-port |
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