| VLSI互连线系统中的低介电常数材料与工艺研究 |
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| 引用本文： | 宋登元,王永青,孙荣霞,张全贵. VLSI互连线系统中的低介电常数材料与工艺研究[J]. 微纳电子技术, 2000, 0(2) |
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| 作者姓名： | 宋登元 王永青 孙荣霞 张全贵 |
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| 作者单位： | 河北大学电子信息工程学院!保定071002(宋登元，王永青，孙荣霞)，河北省电子工业厅!石家庄050002(张全贵) |
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| 摘 要： | 阐述了超大规模集成电路 ( VLSI)特征尺寸的减小及互连线层数增加引起的互连线电容增加的问题。具体总结了为提高 VLSI的速度而采用的低介电常数材料及其制备工艺 ,对在连线间形成空气间隙来降低线间电容的方法也进行了介绍。最后 ,展望了低介电常数材料在 VL SI互连线系统中的应用前景。
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| 关 键 词： | VLSI 互连线 低介电常数材料 |
Low-k- Dielectric Materials and Related Technologies for VLSI Interconnect System |
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| Song Dengyuan,Wang Yongqing,Sun Rongxia. Low-k- Dielectric Materials and Related Technologies for VLSI Interconnect System[J]. Micronanoelectronic Technology, 2000, 0(2) |
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| Authors: | Song Dengyuan Wang Yongqing Sun Rongxia |
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| Abstract: | The issue of interconnect capacitance rising from very large scale integration(VLSI)with a decreased feature size and increased number of wiring layers is described.The low k dielectric materials required in order to improve the chip speed and related fabricating technologies are reviewed.A method of reducing capacitance by air gaps formed between metal lines during SiO 2 deposition is introduced.The application future of low k thin films in IC is also presented. |
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| Keywords: | VLSI Interconnect line Low- k-dielectric materials |
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