| 一种改进的适用于Sigma-Delta ADC的数字抽取滤波器 |
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| 引用本文： | 郝志刚,杨海钢,张翀,吴其松,尹韬.一种改进的适用于Sigma-Delta ADC的数字抽取滤波器[J].电子与信息学报,2010,32(4):1012-1016. |
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| 作者姓名： | 郝志刚 杨海钢 张翀 吴其松 尹韬 |
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| 作者单位： | 1. 中国科学院电子学研究所,北京,100190;中国科学院研究生院,北京,100049
2. 中国科学院电子学研究所,北京,100190 |
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| 基金项目： | 国家863计划项目(2007AA04Z349)资助课题 |
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| 摘 要： | 数字滤波器在sigma-delta ADC芯片中占据了大部分芯片面积，该文提出了一种数字滤波器结构，这种结构滤波器采用一个控制单元和一个加法器取代了Hogenauer结构滤波器中差分器的多个加法器，从而减小数字电路的面积。一个采用这种结构的4阶的数字滤波器在CYCLONE II FPGA芯片中被实现，耗费的硬件资源比Hogenauer结构的滤波器减少近29%。
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| 关 键 词： | Sigma-delta 模数转换器 滤波器 差分器 |
| 收稿时间： | 2009-3-2 |
| 修稿时间： | 2009-7-22 |
An Improved Digital Decimation Filter for Sigma-Delta ADC |
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| Hao Zhi-gang,Yang Hai-gang,Zhang Chong,Wu Qi-song,Yin Tao.An Improved Digital Decimation Filter for Sigma-Delta ADC[J].Journal of Electronics & Information Technology,2010,32(4):1012-1016. |
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| Authors: | Hao Zhi-gang Yang Hai-gang Zhang Chong Wu Qi-song Yin Tao |
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| Institution: | Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China; Graduate University of Chinese Academy of Sciences, Beijing 100049, China |
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| Abstract: | Usually in a sigma-delta ADC, the digital filter takes most of the chip area. In this paper, a novel digital filer topology is proposed, in which the differentiator is constructed with a control unit and an adder instead of the multiple of adders in the Hogenauer structure filter, so that the digital circuit area should be reduced. A fourth order digital filter employing such topology is implemented in a Cyclone-II FPGA, and costs chip resources 29 percent less than in a Hogenauer structure. |
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| Keywords: | Sigma-delta ADC Filter Differentiator |
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