| 基于ADSP-TS101S的高速通用DSP板的实现 |
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| 引用本文： | 王绍清,牛晓丽,韩松.基于ADSP-TS101S的高速通用DSP板的实现[J].现代雷达,2006,28(6):46-48,62. |
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| 作者姓名： | 王绍清 牛晓丽 韩松 |
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| 作者单位： | 1. 中国科学院电子学研究所,北京,100080;中国科学院研究生院,北京,100039
2. 中国科学院电子学研究所,北京,100080 |
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| 摘 要： | 讨论了一种基于ADSP-TS101S的具有大存储容量的高速并行数字信号处理板的实现。该信号处理板采用松耦合结构。具有简洁的输入输出接口，具备大容量存储能力，并可以通过ISA总线与微机通信，板上时序通过CPLD控制。它具有很强的灵活性，能够适用于许多需要高速DSP处理的应用场合，完成高速实时信号处理任务。
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| 关 键 词： | 数字信号处理 ADSP-TS101S芯片 高速并行 大存储容量 |
| 收稿时间： | 2005-08-29 |
| 修稿时间： | 2005-08-292006-03-16 |
A High-speed DSP Board Based on ADSP-TS101S Processors |
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| WANG Shao-qing,NIU Xiao-li,HAN Song.A High-speed DSP Board Based on ADSP-TS101S Processors[J].Modern Radar,2006,28(6):46-48,62. |
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| Authors: | WANG Shao-qing NIU Xiao-li HAN Song |
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| Institution: | 1. Institute of Electronics, Chinese Academy of Sciences, Beijing 100080, China;2. Graduate School, Chinese Academy of Sciences, Beijing 100039, China |
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| Abstract: | This paper presents the realization of a great-storage-capacity high-speed parallel digital signal processing board based on ADSP-TS101S processors. The board has a loose coupling architecture as well as compact interface and great storage capacity and can communicate with PC through ISA bus. The timing on the board can be controlled by CPLD. It is so very flexible that it can be used in many applications which need high-speed DSP processing to implement the task of high-speed real-time signal processing. |
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| Keywords: | DSP ADSP-TS101S chip high-speed parallel great-storage-capacity |
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