| 集成电路测试系统的加流测压及加压测流设计 |
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| 引用本文： | 谭永良,伍广钟,崔华醒.集成电路测试系统的加流测压及加压测流设计[J].电子工业专用设备,2010,39(9):45-47,51. |
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| 作者姓名： | 谭永良 伍广钟 崔华醒 |
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| 作者单位： | 江门市华凯科技有限公司,广东,江门,529100 |
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| 摘 要： | 在集成电路的测试中,通常需要给所测试的集成电路提供稳定的电压或电流,以作测试信号,同时还要对信号进行测量,这就需要用到电压电流源;测试系统能作为测试设备的电压电流源,实现加压测流和加流测压功能。且具有箝位功能,防止负载电压或电流过大而损坏系统。应用结果表明,该检测系统运行稳定可靠,测量精度高。
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| 关 键 词： | 集成电路测试 电压电流源 加压测流 加流测压 箝位 |
Development of Test System FVMI and FIMV |
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| TAN Yongliang,WU Guangzhong,CUI Huaxing.Development of Test System FVMI and FIMV[J].Equipment for Electronic Products Marufacturing,2010,39(9):45-47,51. |
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| Authors: | TAN Yongliang WU Guangzhong CUI Huaxing |
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| Institution: | TAN Yongliang,WU Guangzhong,CUI Huaxing(HuaKai Technology CO.,Ltd.,Jiangmen 529100,China) |
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| Abstract: | In IC test equipment,it needs some stable voltage source or current source as test signal.This system can make the FVMI and FIMV function handled simultaneously.It will take the self-protect function when the load voltage or load current exceeds the clamp value which set by the programmer.The application shows that this system runs stably and accurately. |
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| Keywords: | IC test VI source FVMI FIMV Clamp value |
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