基于SOI的抗辐射加固FPGA芯片

介绍抗辐射VS1000 FPGA芯片架构及其设计实现。改进的基于3输入查找表的多模式逻辑单元,与传统的基于4输入查找表相比,可以提高约12%的逻辑利用率。逻辑模块由两个逻辑单元组成,可以被配置成两种工作模式：LUT模式和分布式RAM模式。新颖的层次化布线通道模块和开关模块可以极大的提高布线资源的布通率。VS1000芯片包括392个可编程逻辑单元,112个用户IO以及与IEEE 1149.1兼容的边界扫描逻辑,采用0.5 um部分耗尽绝缘体上硅CMOS工艺全定制设计并流片。功能测试结果表明, 芯片软硬件能够成功配合且实现用户特定功能。抗辐照实验结果表明,抗总剂量水平超过100Krad(Si), 抗瞬态剂量率水平超过1.510¹¹rad(Si)/s,抗中子注入量水平达到110¹⁴ n/cm²。

A radiation-hardened SOI-based FPGA

A radiation-hardened SRAM-based Field Programmable Gate Array (FPGA) VS1000 was designed and fabricated with 0.5 um partial-depletion silicon-on-insulator (SOI) logic process in CECT 58^th institute. The novel logic cell (LC) with multi-mode based on 3-input look-up-table (LUT) increases logic density about 12% compared with a traditional 4-input LUT. The logic block (LB) consisting of 2 LCs can be used in two functional modes: LUT mode and distributed read access memory (RAM) mode. The hierarchical routing channel block (CHB) and switch block (SB) can significantly improve the flexibility and routability of routing resource. The VS1000 with the package CQFP208 contains 392 reconfigurable LCs, 112 reconfigurable user I/Os and IEEE 1149.1 compatible with boundary-scan logic for testing and programming. The function test results indicate that hardware and software cooperate successfully and the VS1000 works correctly. Moreover the radiation test results indicate that the VS1000 chip has total dose tolerance of 100Krad(Si), dose rate survivability of 1.510¹¹rad(Si)/s and neutron fluence immunity of 110¹⁴ n/cm².