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Selective floating gate non‐volatile paper memory transistor
Authors:Rodrigo Martins,P. Barquinha,L. Pereira,N. Correia,G. Gon  alves,I. Ferreira,E. Fortunato
Affiliation:CENIMAT/I3N, Departamento de Ciências dos Materials, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa e CEMOP/UNINOVA, 2829‐516 Caparica, Portugal
Abstract:Here we report the performance of a selective floating gate (VGS) n‐type non‐volatile memory paper field‐effect transistor. The paper dielectric exhibits a spontaneous polarization of about 1 mCm–2 and GIZO and IZO amorphous oxides are used respectively as the channel and the gate layers. The drain and source regions are based in continuous conductive thin films that promote the integration of fibres coated with the active semiconductor. The floating memory transistor writes, reads and erases the stored information with retention times above 14500 h, and is selective (for VGS > 5 ± 0.1 V). That is, to erase stored information a symmetric pulse to the one used to write must be utilized, allowing to store in the same space different information. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
Keywords:73.40.−  c  73.61.Ga  73.90.+f  85.30.Tv  85.40.Xx
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