固相时间分辨荧光免疫分析仪数据采集系统设计

荧光寿命和时间分辨荧光光谱在时间分辨荧光免疫分析中具有十分重要的地位。本文设计了一款基于CPLD的实时、高速数据采集系统，该系统实现几百纳秒到十几个毫秒范围的荧光测量。使用VHDL硬件描述语言设计CPLD内部的逻辑电路，内部共设置了13种采样频率，测量过程中，可多次选择不同的采样频率，直到得出最理想的结果。采样个数在1-8192范围内任意设置。采样时间及延迟时间可根据需要在1-65535微妙范围内调节，分辨率为1微妙。测量结果表明，该系统满足荧光寿命和时间分辨荧光光谱测量的要求。

Design of data acquistion of solid-phase time-resolved fluorescence immunoassay instrument

Both fluorescence lifetime and time resolved fluorescence spectra are very important in time-resolved fluoroimmunoassay. This article describes a CPLD-based high-speed data acquisition system.In this design,the fluorescence lifetime from a few hundred nanoseconds to more than a dozen milliseconds can be measured. VHDL language had been used in this design of CPLD’s internal logic. There are 13 sampling frequencys can be changed from one to another.The number of sampling can be changed from 1 to 8192 ,also sampling time and delay time can be set arbitrarily, Measurement indicates that the system does well in the measurement of fluorescence lifetime and time-resolved fluoroimmunoassay.