Electronic Properties of Metallic Nanoclusters on Semiconductor Surfaces: Implications for Nanoelectronic Device Applications |
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Authors: | Lee Takhee Liu Jia Chen Nien-Po Andres RP Janes DB Reifenberger R |
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Institution: | (1) Department of Physics, Purdue University, W. Lafayette, IN 47907, USA;(2) School of Chemical Engineering, Purdue University, W. Lafayette, IN 47907, USA;(3) School of Electrical and Computer Engineering, Purdue University, W. Lafayette, IN 47907, USA;(4) Department of Physics, Purdue University, W. Lafayette, IN 47907, USA |
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Abstract: | We review current research on the electronic properties of nanoscale metallic islands and clusters deposited on semiconductor substrates. Reported results for a number of nanoscale metal-semiconductor systems are summarized in terms of their fabrication and characterization. In addition to the issues faced in large-area metal-semiconductor systems, nano-systems present unique challenges in both the realization of well-controlled interfaces at the nanoscale and the ability to adequately characterize their electrical properties. Imaging by scanning tunneling microscopy as well as electrical characterization by current-voltage spectroscopy enable the study of the electrical properties of nanoclusters/semiconductor systems at the nanoscale. As an example of the low-resistance interfaces that can be realized, low-resistance nanocontacts consisting of metal nanoclusters deposited on specially designed ohmic contact structures are described. To illustrate a possible path to employing metal/semiconductor nanostructures in nanoelectronic applications, we also describe the fabrication and performance of uniform 2-D arrays of such metallic clusters on semiconductor substrates. Using self-assembly techniques involving conjugated organic tether molecules, arrays of nanoclusters have been formed in both unpatterned and patterned regions on semiconductor surfaces. Imaging and electrical characterization via scanning tunneling microscopy/spectroscopy indicate that high quality local ordering has been achieved within the arrays and that the clusters are electronically coupled to the semiconductor substrate via the low-resistance metal/semiconductor interface. |
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Keywords: | nanotechnology nanocluster array self-assembly GaAs STM |
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