基于ADF4157的∑-△小数分频锁相环频率合成器设计

该文应用ADF4157PLL集成芯片实现∑-△小数分频锁相技术,重点讨论了1.35GHz～2.35GHz频段∑-△小数分频频率合成的原理和实现方法.其相位噪声曲线图与传统的FPGA合成算法实现的结果基本一致.实验数据充分证明了∑-△小数分频PLL集成芯片可以替代传统的FPGA合成算法,具有易调试、集成度高、一致性好等优...

Design of Sigma-delta Fractional-N PLL Frequency Synthesizer Based on ADF4157

In this paper,the PLL chip ADF4157 is used to actualize the sigma-delta fractional-N PLL technology.The theory of the sigma-delta fractional-N PLL frequency synthesizer and the way to implement is emphasis discussed within 1.35GHz～2.35GHz frequency bands.It＇s phase noise graph is consistent to the traditional FPGA synthetic arithmetic.The experiment data proves that the sigma-delta fractional-N PLL chip can replace the traditional FPGA synthetic arithmetic,the advantage of the PLL chip is easy to debugging、high integration、good consistency.