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内嵌SCR的LDMOS器件双骤回ESD特性研究
引用本文:蒋苓利,张波,樊航,乔明,李肇基.内嵌SCR的LDMOS器件双骤回ESD特性研究[J].半导体学报,2011,32(9):094002-4.
作者姓名:蒋苓利  张波  樊航  乔明  李肇基
作者单位:电子科技大学,电子科技大学,电子科技大学,电子科技大学,电子科技大学
摘    要:基于寄生参数分析,对内嵌SCR的LDMOS器件给出了二次骤回发生判据。本文对三种典型结构进行了数值仿真和比较,并基于此判据仿真优化了影响二次骤回的器件结构参数,从而提高器件ESD性能。TLP试验数据表明,当二次骤回电压由25.4V降低到8.1V时,器件ESD泄放能力由0.57A提高到3.1A。

关 键 词:LDMOS  可控硅  嵌入式  合并  快照  鲁棒性  ESD  结构相
收稿时间:3/17/2011 4:35:27 PM
修稿时间:5/9/2011 9:19:36 PM

ESD robustness studies on the double snapback characteristics of an LDMOS with an embedded SCR
Jiang Lingli,Zhang Bo,Fan Hang,Qiao Ming and Li Zhaoji.ESD robustness studies on the double snapback characteristics of an LDMOS with an embedded SCR[J].Chinese Journal of Semiconductors,2011,32(9):094002-4.
Authors:Jiang Lingli  Zhang Bo  Fan Hang  Qiao Ming and Li Zhaoji
Institution:University of Electronic Science and Technology of China,University of Electronic Science and Technology of China,University of Electronic Science and Technology of China,University of Electronic Science and Technology of China,University of Electronic Science and Technology of China
Abstract:Criterion for the second snapback of LDMOS with embedded SCR is given in this letter based on parasitic parameter analysis. According to this criterion, three typical structures are compared by numerical simulation, and structure parameters which influence the second snapback are also analyzed to optimize the ESD characteristics. Experiment data showed that, as second snapback voltage decreased from 25.4V to 8.1V, the discharge ability of optimized structure raised from 0.57A up to 3.1A.
Keywords:ESD  LDMOS  SCR  double snapback
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