| 三目立体视觉外极线校正及其FPGA实现方法 |
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| 引用本文： | 安路平,贾云得,李鸣翔.三目立体视觉外极线校正及其FPGA实现方法[J].北京理工大学学报,2005,25(10):872-875. |
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| 作者姓名： | 安路平 贾云得 李鸣翔 |
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| 作者单位： | 北京理工大学,信息科学技术学院计算机科学工程系,北京,100081;北京理工大学,信息科学技术学院计算机科学工程系,北京,100081;北京理工大学,信息科学技术学院计算机科学工程系,北京,100081 |
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| 摘 要： | 提出一种三目立体视觉外极线校正的快速算法.3个摄像机呈直角三角形配置,且已知摄像机透视投影矩阵.根据校正基本约束确定校正后的图像平面,利用图像不变形约束计算校正所需的三阶矩阵,用于在平面仿射坐标系下对图像进行重取样,使图像的行列对齐.给出了基于FPGA的实时计算三目立体视觉外极线校正的硬件实现方法.在时钟频率为60 MHz,图像可分辨的像素数为640×480时,三目立体视觉外极线校正速度达到48帧/s.
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| 关 键 词： | 立体视觉 三目视觉 外极线校正 现场可编程门阵列 |
| 文章编号： | 1001-0645(2005)10-0872-04 |
| 收稿时间： | 11 23 2004 12:00AM |
| 修稿时间： | 2004年11月23日 |
Trinocular Epipolar Rectification and Its Implementation with an FPGA |
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| AN Lu-ping,JIA Yun-de and LI Ming-xiang.Trinocular Epipolar Rectification and Its Implementation with an FPGA[J].Journal of Beijing Institute of Technology(Natural Science Edition),2005,25(10):872-875. |
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| Authors: | AN Lu-ping JIA Yun-de and LI Ming-xiang |
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| Institution: | Department of Computer Science and Engineering,School of Information Science and Technology,Beijing Institute of Technology,Beijing100081,China;Department of Computer Science and Engineering,School of Information Science and Technology,Beijing Institute of Technology,Beijing100081,China;Department of Computer Science and Engineering,School of Information Science and Technology,Beijing Institute of Technology,Beijing100081,China |
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| Abstract: | An efficient algorithm of trinocular epipolar rectification is proposed.The trinocular stereo system involves three cameras in trianglular configuration with known perspective matrices.The common image plane of three images after rectification is calculated under rectification constraints,and three-ranked matrices are then computed under undistorted image constraints.With this the image is resampled in planar affine coordinate to align images either in row or in column.The implementation of trinocular epipolar rectification in real time with a single chip of FPGA is discussed.A performance of 48 frames per second is achieved with an image size of 640×480 pixels and a clock frequency of 60 MHz. |
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| Keywords: | stereo vision trinocular vision epipolar rectification FPGA |
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