Growth kinetics of SiGe/Si superlattices on bulk and silicon-on-insulator substrates for multi-channel devices

We have studied in reduced pressure chemical vapor deposition the growth kinetics of Si and Si_0.8Ge_0.2 on bulk Si(0 0 1) and on silicon-on-insulator (145 nm buried oxide/20 nm Si over-layer) substrates. For this, we have grown at 650 °C, 20 Torr 19 periods (Si_0.8Ge_0.2 19 nm/Si 32 nm) superlattices on both types of substrates that we have studied in secondary ion mass spectrometry, X-ray diffraction and cross-sectional transmission electron microscopy. The Si and SiGe growth rates together with the Ge content are steady on bulk Si(0 0 1), with mean values around 9.5 nm min⁻¹ and 20.2%, respectively. In contrast, growth rates decrease from ∼9.5 nm min⁻¹ down to values around 7.0 nm min⁻¹ (SiGe) and 6.3 nm min⁻¹ (Si), when the deposited thickness on SOI increases from 0 up to slightly more than 100 nm. They then go back up to values around 8.8–9.0 nm min⁻¹ as the thickness increases from 100 up to 400 nm. They then slowly decrease to values around 8.4–8.6 nm min⁻¹ as the thickness increases from 400 up to 800 nm. The Ge concentration follows on SOI exactly the opposite trend: an increase from 19.9% (0 nm) up to 20.6% (∼100 nm) followed by a decrease to values around 20.1% (400 nm) then a slow re-increase up to 20.4% (800 nm). These fluctuations are most likely due to the following SOI surface temperature variations: from 650 °C down to 638 °C (100 nm), back up to 648 °C (400 nm) followed by a slow decrease to 646 °C (800 nm). These data curves will be most useful to grow on conventional SOI substrates large number of periods, regular Si/Si_0.8Ge_0.2 superlattices that will serve as the core of multi-channel or three-dimensional nano-wires field effect transistors.