An improved model for ground-shielded CMOS test fixtures

An improved model for ground-shielded (GS) test fixtures is proposed. The proposed model provides more accurate device-under-test gap behavioral model than previous test-fixture models and takes into account the impedance of the ground return path. The new model is validated up to 25 GHz by comparing the model simulations with experimental measurements. The proposed model is applied to bulk-silicon- and sapphire-based GS test fixtures with different layouts. Furthermore, a large phase shift in the shield-based test-fixture forward transmission is reported in this study. Based on the results achieved, suggestions for deembedding method selection are given. Test fixtures were fabricated using a 0.35-/spl mu/m CMOS process and 0.5-/spl mu/m silicon-on-sapphire CMOS process.