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On the crack and delamination risk optimization of a Si-interposer for LED packaging
Institution:1. Micro Materials Center at Fraunhofer ENAS, Technologie-Campus 3, 09126 Chemnitz, Germany;2. Fraunhofer IZM, Berlin, Germany;1. Department of Engineering Science, National Cheng Kung University, Tainan 701, Taiwan, ROC;2. Package Innovation Kaohsiung, NXP Semiconductors, Kaohsiung 811, Taiwan, ROC;1. KULeuven, Department of Mechanical Engineering, Celestijnenlaan 300, 3001 Leuven, Belgium;2. IMEC, Kapeldreef 75, 3001 Leuven, Belgium;3. KULeuven, Department MTM, Kasteelpark Arenberg 44, 3001 Leuven, Belgium;1. Department of Mechanical Engineering, Texas A&M University, TX 77843, USA;2. Department of Materials Science and Engineering, Texas A&M University, TX 77843, USA;1. Embedded Processing Business, Texas Instruments, Bangalore 93, India;2. Indian Institute of Technology Bombay, Mumbai, India;1. Imec, Kapeldreef 75, B-3001 Leuven, Belgium;2. KULeuven, Dept MTM, Celestijnenlaan 300A, B-3001 Leuven, Belgium
Abstract:3D-integration becomes more and more an important issue for advanced LED packaging solutions as it is a great challenge for the thermo-mechanical reliability to remove heat from LEDs to the environment by heat spreading or specialized cooling technologies. Thermal copper-TSVs provide an elegant solution to effectively transfer heat from LED to the heat spreading structures on the backside of a substrate. But, the use of copper-TSVs generates also novel challenges for reliability as well as also for reliability analysis and prediction, i.e. to manage multiple failure modes acting combined – interface delamination, cracking and fatigue, in particular. In this case, the thermal expansion mismatch between copper and silicon yields to risky stress situations.To overcome cracking and delamination risks in the vicinity of thermal copper-TSVs the authors performed extensive simulative work by means of fracture mechanics approaches – an interaction integral approach within a simulative DoE and the X-FEM methodology to help clarifying crack propagation paths in silicon. The results provided a good insight into the role of model parameters for further optimizations of the intended thermal TSV-approaches in LED packaging applications.
Keywords:Crack  Delamination  LED packaging  FEA  XFEM
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