| 简化的模(2n-1)乘运算算法及其VLSI结构 |
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| 引用本文： | 熊承义,高志荣,田金文,柳健.简化的模(2n-1)乘运算算法及其VLSI结构[J].微电子学,2005,35(5):486-488,492. |
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| 作者姓名： | 熊承义 高志荣 田金文 柳健 |
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| 作者单位： | [1]华中科技大学图像识别与人工智能研究所,图像信息处理与智能控制教育部重点实验室,湖北武汉430074 [2]中南民族大学电子与信息学院,湖北武汉430074 [3]武汉科技学院计算机科学系,湖北武汉430074 |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 文章提出了一种有效的模(2n-1)余数乘法器实现的算法及其VLSI结构, 其输入为通常的二进制表示, 因此无需另外的输入数据转换电路即可用于数字信号处理.通过利用模(2n-1)运算的周期性,简化其乘积项,并重组求和项优化结构,以减少路径延时和硬件复杂度.较之同类设计, 该结构更加规则,且具有更好的面积和速度性能.
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| 关 键 词： | 剩余数系统 模(2n-1)乘法器 周期性 |
| 文章编号： | 1004-3365（2005）05-0486-03 |
| 收稿时间： | 2004-11-24 |
| 修稿时间： | 2004-11-242005-02-23 |
Simplified Algorithm for Modulo (2n-1) Multiplication and Its VLSI Architecture |
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| XIONG Cheng-yi, GAO Zhi-rong, TIAN Jin-wen , LIU Jian..Simplified Algorithm for Modulo (2n-1) Multiplication and Its VLSI Architecture[J].Microelectronics,2005,35(5):486-488,492. |
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| Authors: | XIONG Cheng-yi GAO Zhi-rong TIAN Jin-wen LIU Jian |
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| Institution: | XIONG Cheng-yi, GAO Zhi-rong, TIAN Jin-wen , LIU Jian.(1. Education Ministry Key Lab for Image Processing and Intelligent Control, Huazhong Univ. of Sci. |
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| Abstract: | A simple algorithm for residue multiplier of modulo(2~n-1) and an efficient architecture for the algorithm are presented,in which the input operands are represented as normal binary,so that no additional conversion circuit is required for DSP applications.The critical path delay and hardware complexity are reduced efficiently by making use of periodicity of modulo(2~n-1) operation to simplify products and re-combining each sum term.Compared with other designs,the proposed architecture is more regular and efficient with regard to area and delay. |
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| Keywords: | VLSI |
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