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基于脉动阵列的复数定点QR分解VLSI设计
引用本文:马晓龙,陈贵灿. 基于脉动阵列的复数定点QR分解VLSI设计[J]. 微电子学, 2011, 41(5)
作者姓名:马晓龙  陈贵灿
作者单位:西安交通大学电子与信息工程学院,西安,710049
摘    要:提出一种应用Givens变换实现QR分解的脉动阵列中的边界单元和内部单元电路结构。在硬件成本增加不多的条件下,应用牛顿-拉夫逊迭代方法和查询表技术,实现了平方根倒数的快速计算。综合的电路工作时钟达100MHz,两种单元的数据处理周期均为120ns,阵列数据处理速度高于相关文献报道40%以上。

关 键 词:QR分解  脉动阵列  牛顿-拉夫逊迭代  VLSI  

VLSI Design for Plural Fixed-Point QR Decomposition Based on Systolic Array
MA Xiaolong,CHEN Guican. VLSI Design for Plural Fixed-Point QR Decomposition Based on Systolic Array[J]. Microelectronics, 2011, 41(5)
Authors:MA Xiaolong  CHEN Guican
Affiliation:MA Xiaolong,CHEN Guican(School of Electronics and Information Engineering,Xi'an Jiaotong University,Xi'an 710049,P.R.China)
Abstract:New circuit structures of boundary cell and internal cell in systolic array were proposed,in which QR decomposition(QRD) was realized with Givens transform.Newton-Raphson iteration and look-up table were adopted to rapidly calculate inversed square root function with little extra hardware cost.The synthesized circuits operated at 100 MHz.Both cells had a data processing cycle of 120 ns,and the data processing speed of the circuit was about 40% higher than that in the published literature.
Keywords:QR decomposition  Systolic array  Newton-Raphson iteration  VLSI  
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