量子乘法器的设计及其实现方法

乘法器在数字信号处理和数字通信领域应用广泛，如何实现快速高效的乘法器关系着整个系统的运算速度。提出了一种新颖的量子乘法器设计方法，利用量子门设计一位量子全加器，并将n个一位量子全加器叠加在一起设计n位量子全加器，实现2个n位二进制数的加和；再利用2个控制非门设计置零电路，并使用置零电路设计量子右移算子；对二进制数乘法步骤进行改进，利用量子全加器和量子右移算子设计量子乘法器，同时设计实现此乘法器的量子线路。时间复杂度分析结果表明，本方法与目前最高效的量子乘法器具有相同的时间复杂度，并具有更简洁的实现方法。

Quantum multiplier and its implementation method

Multiplier is widely used in digital signal processing and digital communications. How to achieve fast and efficient multiplier affects the speed of the entire system. This paper proposes a novel method for quantum multiplier. Firstly, a 1 bit quantum full adder is designed using the quantum gates, and an n bit quantum full adder is completed by superimpose the 1 bit quantum full adder n times, which can achieve the addition of two n bit binary Numbers. Secondly, using two CNOT gates to design a zero setting circuit, and a quantum right shift operator can be implemented by using the zero setting circuit. Finally, the multiplication steps of binary numbers are improved, quantum full adder and quantum right shift operators are used to design quantum multiplier, and a quantum circuit for implementing this multiplier is designed at the same time. The time complexity analysis results show that this method has the same time complexity as the most efficient quantum multipliers and has a simpler implementation.