New March Tests for Multiport RAM Devices |
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Authors: | Kanad Chakraborty Pinaki Mazumder |
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Institution: | (1) Advanced Reliable Systems (ARES) Laboratory, Department of Electrical Engineering, National Central University, Jhongli, Taiwan, 320; |
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Abstract: | This paper describes three new march tests for multiport memories. A read (or write) port in such a memory consists of an n-bit address register, an n-to-2n-bit decoder (with column multiplexers for the column addresses) and drivers, and a K-bit data register. This approach gives comprehensive fault coverage for both array and multiport decoder coupling faults. It lends itself to a useful BIST implementation with a modest area overhead that tests these faults and achieves low test application time. |
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Keywords: | multi-port RAM simplex and duplex coupling faults concurrent coupling faults |
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