基于FPGA的时间间隔测量系统的设计

为了解决电容充放电放大电路测量时间间隔的不稳定，采用复杂可编程芯片FPGA设计实现精密时间间隔的测量。FPGA的锁相环（PLL）电路得到高频时钟，时钟管理器（DCM）实现高速时钟移相，内插时钟得到高精度时间测量。通过在光电回波脉冲时间间隔测量系统中验证，该设计可以得到200ps的时间间隔测量精度。采用FPGA芯片设计的数字化测量系统，具有集成度高，性能稳定，抗干扰强，设计方便等优点，能广泛应用于科研和生产中

Design of time interval measurement system based on FPGA

In order to solve the instability of the charge and discharge of capacitance in amplify circuit measurement time interval, adopt complex programmable FPGA chip to design and realize the precise measurement of the time interval. We use Phase-Locked Loop (PLL) and Digital Clock Manager (DCM) circuit of FPGA to realize interpolation of clock. Through verification in photoelectric echo pulse time interval measurement system, we get precision of 200ps time interval measurement. FPGA is characterized by a high level of integration, stable and reliable performance, strong anti-interference, etc. It is widely used in scientific research and production.