Design of Adaptive Filter based on FPGA and Signum-LMS Algorithm
Abstract:
To decrease the consumption of hardware resource of adaptive filter based on FPGA and LMS algorithm, signum-LMS algorithm is proposed. The processing speed of adaptive filter is increased by reducing the number of multiplications and optimized by pipelining technology. Software simulation verifies the feasibility of signum-LMS algorithm. Hardware simulation proves the superiorities of the adaptive filter using the proposed algorithm and pipelining technology.