| 高阶IIR滤波器的FPGA实现 |
| |
| 引用本文： | 曾菊容.高阶IIR滤波器的FPGA实现[J].电子设计工程,2011,19(10):173-175,179. |
| |
| 作者姓名： | 曾菊容 |
| |
| 作者单位： | 宜宾学院,物理与电子工程学院,四川,宜宾,644000 |
| |
| 摘 要： | 结合IIR数字滤波器的基本结构,针对分布式算法中查找表规模过大的缺点,采用级联或并联结构,利用多块查找表使得硬件规模极大地减小,提出了并行和串行相结合的设计方案,并且实现了级联方式的10阶IIR低通滤波器。通过试验验证了该方法的有效性和实时性。
|
| 关 键 词： | FPGA IIR滤波器 分布式算法 查找表 |
Design of higher step IIR filter based on FPGA |
| |
| ZENG Ju-rong.Design of higher step IIR filter based on FPGA[J].Electronic Design Engineering,2011,19(10):173-175,179. |
| |
| Authors: | ZENG Ju-rong |
| |
| Institution: | ZENG Ju-rong(Department of Physics and Electronic Engineering,Yibin 644000,China) |
| |
| Abstract: | The paper according to the characteristic of basic framework of IIR filters and the scale of the LUT in the distributed arithmetic algorithm is SO large,the thesis reduces it with the use of multiple coefficient memory banks and cascade mode or parallel mode,and the combination of tie parallel and serial scheme is implemented in paper,and realize a ten steps low pass IIR filter connected in serial.The test results showed that the design method has validity,real time effectiveness and feasibility. |
| |
| Keywords: | FPGA IIR filter DA LUT |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
|
