College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China
Abstract:
A novel split-gate power UMOSFET with a variable K dielectric layer is proposed.This device shows a 36.2% reduction in the specific on-state resistance at a breakdown voltage of 115 V,as compared with the SGE-UMOS device.Numerical simulation results indicate that the proposed device features high performance with an improved figure of merit of Qg × RON and BV2/RON,as compared with the previous power UMOSFET.