| 基于FPGA的数字逻辑器件开发及优化设计 |
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| 引用本文： | 戴泰初,阙沛文.基于FPGA的数字逻辑器件开发及优化设计[J].微电子学,2002,32(5):397-400. |
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| 作者姓名： | 戴泰初 阙沛文 |
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| 作者单位： | 上海交通大学,电子信息学院,上海,200030 |
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| 摘 要： | 介绍了基于现场可编程门阵列(FPGA)的数字逻辑器件开发及其电子设计自动化方法,详细讨论了在MAX plus Ⅱ环境下有效地提高开发数字逻辑电路效率的优化设计方法.
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| 关 键 词： | 现场可编程逻辑门阵列 数字逻辑器件 硬件描述语言 电子设计自动化 |
| 文章编号： | 1004-3365(2002)05-0397-04 |
| 修稿时间： | 2001年11月5日 |
The Design of Digital Logic Device Based on FPGA and Its Optimization |
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| DAI Tai chu,QUE Pei wen.The Design of Digital Logic Device Based on FPGA and Its Optimization[J].Microelectronics,2002,32(5):397-400. |
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| Authors: | DAI Tai chu QUE Pei wen |
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| Abstract: | The development of digital logic device based on FPGA and its design with EDA are presented in the paper The optimization method to enhance the efficiency of digital logic circuit under the environment of MAX+plus II is discussed in detail |
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