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基于FPGA的多普勒雷达测速系统设计
引用本文:李锦明,张虎威,高文刚,郭淳. 基于FPGA的多普勒雷达测速系统设计[J]. 电子器件, 2017, 40(6)
作者姓名:李锦明  张虎威  高文刚  郭淳
作者单位:中北大学先进制造中心
摘    要:为了实现对车辆速度进行高实时性、高精度的测量,设计了一种基于FPGA的多普勒雷达测速系统。系统以Spartan 6系列FPGA作为核心处理器,使用高精度ADC采集微波雷达模块输出的混频信号,将数据通过FPGA进行快速傅里叶变换(FFT)处理并利用Welch算法进行频谱分析,提取出运动车辆的多普勒频移,进而根据多普勒效应计算出被测车辆的运动速度。该设计利用FPGA在并行处理方面的速度优势对算法进行了优化,有效地降低了系统延时、提高了系统的处理速度和实时性。仿真和实验结果表明:系统工作稳定,具有较高的实时性,测量精度小于1km/h。

关 键 词:雷达测速;FFT;FPGA;频谱分析

Design of Doppler radar speed measurement system based on FPGA
Abstract:In order to realize the high real-time performance and high precision measurement of vehicle speed, a Doppler radar speed measurement system based on FPGA is designed.The system takes FPGA as the core processor, makes use of high precision ADC to acquire signals?with mixed?frequencies, then carries out fast Fourier transform(FFT) and analyses the spectrum by Welch algorithm in FPGA, which extract the Doppler frequency shift of moving vehicles, then uses the Doppler effect to calculate the velocity of the vehicle under test. The design makes full use of the speed advantage of FPGA in parallel processing to optimize the algorithm, which can effectively reduce the system delay and improve the processing speed and real-time performance of the system. The results of simulation and experiment show that the system works stably and has high real-time performance, the measurement accuracy is less than 1km/h.
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