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Process planning for circuit card assembly on a series of dual head placement machines
Authors:Nilanjan D. Choudhury  Wilbert E. Wilhelm  Brijesh Rao  Jonathan Gott  Nikhilesh Khotekar
Affiliation:1. HSBC, 2700 Sanders Avenue, Prospect Heights, Chicago, IL, United States;2. Department of Industrial Engineering, Texas A&M University, TAMUS 3131 College Station, TX 77843-3131, United States;3. US Army, Atlanta, GA, United States;4. Dash Optimization, 560 Sylvan Avenue, Englewood Cliffs, NJ 07632, United States
Abstract:This paper proposes an approach for prescribing the inter-related decisions that prescribe a process plan for a series of dual head placement machines. The goal is to provide a means of rapidly prescribing a process plan that seeks to minimize cycle time (equivalently, maximize throughput rate) by balancing workloads assigned to heads when assembling a given type of circuit card. Our approach decomposes process planning decisions into four related problems. This paper explores list-processing heuristics for the first of these problems and adapts an optimizing method for the fourth. It also integrates these two methods with others to optimize the second and third of these problems, reporting computational tests that evaluate the overall approach to all four problems and assessing the degree to which the decomposition approach is able to balance workloads assigned and the run time required to do so. Resulting cycle times are also analyzed. These test results demonstrate that the overall approach provides a means of prescribing effective process plans within a run time acceptable to process planners.
Keywords:Heuristics   Integer programming   Assembly line balancing   Circuit card assembly   Process planning
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