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硅基单片式复合晶体管的结构参数对高功率微波损伤效应的影响
作者姓名:Jin Wenxuan  Chai Changchun  Liu Yuqian  Wu Han  Yang Yintang
作者单位:西安电子科技大学 微电子学院, 教育部宽禁带半导体材料与器件重点实验室, 西安 710071
基金项目:Open Fund of Key Laboratory of Complex Electromagnetic Environment Science and Technology, China Academy of Engineering Physics2015-0214.XYK
摘    要:建立了三种不同结构的硅基单片式复合晶体管(由T1和T2两个晶体管构成)的二维电热模型,研究了高功率微波对不同结构的硅基单片式复合晶体管的损伤效应的影响。获得了不同器件结构下导致复合晶体管损伤的损伤功率阈值和损伤能量阈值分别与脉宽的关系。结果表明,当复合晶体管的总体尺寸不变而T2和T1晶体管的面积比值更大时需要更多的功率和能量来损伤器件。通过分析器件内部电场、电流密度和温度分布的变化,得到了复合晶体管的结构对其微波损伤效应的影响规律。对比发现,三种结构的复合晶体管的损伤点均位于T2管的发射极附近,随着T2和T1晶体管面积比的增大,电场、电流密度和温度在器件内部的分布将变得更加分散。此外,在发射极处增加外接电阻Re,研究表明损伤时间随发射极电阻的增大而增加。因此可以得出结论,适当改变器件结构或增加外接元件可以增强器件的抗微波损伤能力。晶体管的仿真毁伤点与实验结果一致。

关 键 词:单片式复合晶体管    高功率微波    器件结构    外加元件
收稿时间:2019-06-17

Microwave damage susceptibilitytrend of the silicon NPN monolithic composite transistor as a function of structure parameters
Jin Wenxuan,Chai Changchun,Liu Yuqian,Wu Han,Yang Yintang.Microwave damage susceptibilitytrend of the silicon NPN monolithic composite transistor as a function of structure parameters[J].High Power Laser and Particle Beams,2019,31(10):103220-1-103220-9.
Institution:Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China
Abstract:This paper presents a theoretical study on the influences of the device structure parameters on the damage progress of the silicon NPN monolithic composite transistor induced by injection power. The silicon NPN monolithic composite transistors (composed by two successive transistors, T1 and T2) with three different structural parameters are established utilizing the circuit simulator, Sentaurus-TCAD. The dependences of the damage energy threshold and the damage power threshold required to cause the device failure on the pulse-width are obtained. The results show that higher power threshold and more energy are needed to damage the device if the area of the T2 transistor is larger. A study of the damage mechanism is conducted based on the variation analysis of the distributions of the electric field, current density, and temperature in the device. It is found that the distributions of the electric field, current density, and temperature become more dispersed as the area of the T2 transistor increases. It is concluded that when the overall area of the silicon NPN monolithic composite transistor is constant, and as the area ratio of the T2 transistor and the T1 transistor increases, the device becomes less vulnerable to damage. Moreover, the emitter resistor Re has a significant effect on the burnout time. The simulated burnt spot position of the transistor is in good agreement with the experimental result.
Keywords:
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