A low temperature surface preparation method for STM nano-lithography on Si(1 0 0) |
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Authors: | JA Mol SPC Beentjes S Rogge |
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Institution: | Kavli Institute of Nanoscience, Delft University of Technology, Lorentzweg 1, 2628 CJ Delft, The Netherlands |
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Abstract: | Registration markers are crucial in connecting scanning tunneling microscope (STM) lithographed nano- and atomic-scale devices to the outside world. In this paper we revisit an ultra high vacuum annealing method with a low thermal budget that is fully compatible with etched registration markers and results in clean 2 × 1 reconstructed Si(1 0 0) surfaces required for STM lithography. Surface contamination is prevented by chemically stripping and reforming a protective silicon oxide layer before transferring the sample to the vacuum system. This allows for annealing temperatures of only 900 °C, where normally carbon contaminants result in the formation of SiC clusters on the surface at annealing temperatures below 950 °C. Reactive ion etched marker structures with an etch depth of 60 nm and a typical lateral dimension of only 150 nm survive a 900 °C flash anneal. |
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Keywords: | Silicon STM Surface preparation Relocation markers |
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