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A low specific on-resistance SOI MOSFET with dual gates and a recessed drain |
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| Authors: | Luo Xiao-Rong ab Luo Yin-Chun b Fan Ye b Hu Gang-Yi a Wang Xiao-Wei b Zhang Zheng-Yuan a Fan Yuan-Hang b Cai Jin-Yong b Wang Pei b and Zhou Kun |
| Institution: | b) a)Science and Technology on Analog Integrated Circuit Laboratory,Chongqing 400060,China b)State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China |
| Abstract: | |
| Keywords: | MOSFET silicon-on-insulator breakdown voltage specific on-resistance |
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