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辐射加固SOI的SRAM基FPGA中IO模块阵列的设计与实现
引用本文:赵岩,吴利华,韩小炜,李艳,张倩莉,陈亮,张国全,李建忠,杨波,高见头,王剑,李明,刘贵宅,张峰,郭旭峰,赵凯,陈陵都,于芳,刘忠立.辐射加固SOI的SRAM基FPGA中IO模块阵列的设计与实现[J].半导体学报,2012,33(1):015010-7.
作者姓名:赵岩  吴利华  韩小炜  李艳  张倩莉  陈亮  张国全  李建忠  杨波  高见头  王剑  李明  刘贵宅  张峰  郭旭峰  赵凯  陈陵都  于芳  刘忠立
作者单位:中国科学院半导体研究所
摘    要:本文中我们提出了一个用于辐射加固的SRAM基FPGA VS100的输入输出模块阵列,该FPGA用0.5微米部分耗尽SOI工艺设计,在中电集团58所流片。与FPGA的特性一致,每一个IO单元都由布线资源和两个IOC组成,IOC包括信号通路电路,可编程输入/输出驱动器和ESD保护网络组成。IO模块能用于不同的工作模式时,边界扫描电路既可以插入在输入输出数据路径电路和驱动器之间,也可以作为透明电路。可编程IO驱动器使IO模块能够用于TTL和CMOS电平标准。布线资源使得IO模块和内部逻辑之间的连接更加灵活和方便。辐射加固设计,包括A型体接触晶体管,H型体接触晶体管和特殊的D触发器的设计提高了抗辐射性能。ESD保护网络为端口上的高脉冲提供了放电路径,防止大电流损坏内部逻辑。这些设计方法可以适用于不同大小和结构的FPGA设计。IO单元阵列的功能和性能经过了功能测试和辐射测试的考验,辐照实验结果表明,抗总剂量水平超过100Krad(Si), 抗瞬态剂量率水平超过1.51011rad(Si)/s,抗中子注入量水平达到11014 n/cm2

关 键 词:现场可编程门阵列  FPGA设计  抗辐射性能  SRAM  SOI  基础  输入/输出电路  输出缓冲器
收稿时间:6/27/2011 6:35:53 PM
修稿时间:6/27/2011 6:35:53 PM

An IO block array in a radiation-hardened SOI SRAM-based FPGA
Zhao Yan,Wu Lihu,Han Xiaowei,Li Yan,Zhang Qianli,Chen Liang,Zhang Guoquan,Li Jianzhong,Yang Bo,Gao Jiantou,Wang Jian,Li Ming,Liu Guizhai,Zhang Feng,Guo Xufeng,Zhao Kai,Stanley L. Chen,Yu Fang and Liu Zhongli.An IO block array in a radiation-hardened SOI SRAM-based FPGA[J].Chinese Journal of Semiconductors,2012,33(1):015010-7.
Authors:Zhao Yan  Wu Lihu  Han Xiaowei  Li Yan  Zhang Qianli  Chen Liang  Zhang Guoquan  Li Jianzhong  Yang Bo  Gao Jiantou  Wang Jian  Li Ming  Liu Guizhai  Zhang Feng  Guo Xufeng  Zhao Kai  Stanley L Chen  Yu Fang and Liu Zhongli
Institution:Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
Abstract:
Keywords:partially-depleted SOI  FPGA  IOB  radiation-hardened  ESD protection
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