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一种PCIe交换电路设计与实现
引用本文:林凡淼,刘鑫,陆晓峰.一种PCIe交换电路设计与实现[J].电子与封装,2021,21(3):48-52.
作者姓名:林凡淼  刘鑫  陆晓峰
作者单位:中科芯集成电路有限公司,江苏无锡214072
摘    要:随着高速串行计算机扩展总线标准(PCIe)技术的成熟和应用场合的增多,传统的“点对点”传输已不能满足不同设备之间高速数据传输的需求,因此有必要对PCIe数据交换技术进行研究.为了更加方便且高效地进行PCIe总线高速数据传输,也为了能将PCIe设备进行拓展,设计了一种以国产CPU为核心的PCIe交换电路,详细介绍了硬件设...

关 键 词:PCIe总线  PCIe交换电路  高速数据传输  丢包率

Design and Implementation of a PCIe Switching Circuit
LIN Fanmiao,LIU Xin,LU Xiaofeng.Design and Implementation of a PCIe Switching Circuit[J].Electronics & Packaging,2021,21(3):48-52.
Authors:LIN Fanmiao  LIU Xin  LU Xiaofeng
Institution:(China Key System&Integrated Circuit Co.,Ltd.,Wuxi 214072,China)
Abstract:With the maturity and more and more applications of peripheral component interconnect express(PCIe)technology,the traditional PCIe bus’point to point’transmission cannot satisfy the needs of high-speed data transmission between different devices,so it is necessary to research PCIe data exchange technology.A PCIe switching circuit with domestic CPU as the core is designed in order to carry out high-speed data transmission of PCIe bus more conveniently and efficiently,and the hardware design scheme and test method are introduced in detail.Under the condition that the PCB can work normally,the magnitude of the ping package(up to 115200)is gradually increased,and the transmission time and packet loss rate are less than 10 ms and 5×10-4 after stable operation for at least 30 minutes.It verifies the feasibility and reliability of the design.
Keywords:PCIe bus  PCIe switching circuit  high-speed data transmission  package loss rate
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