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A 130 nm CMOS low-power SAR ADC for wide-band communication systems
Authors:Bian Chenghao  Yan Jun  Shi Yin and Sun Ling
Institution:Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Jiangsu Key Laboratory of ASIC Design, Nantong University, Nantong 226019, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Jiangsu Key Laboratory of ASIC Design, Nantong University, Nantong 226019, China
Abstract:ADC SAR capacitor-sharing error compensation capacitor array dynamic logic
Keywords:ADC  SAR  capacitor-sharing  error compensation  capacitor array  dynamic logic
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