| 用现场可编程门阵列实现的频率计 |
| |
| 引用本文： | 吴建新.用现场可编程门阵列实现的频率计[J].电声技术,2007,31(9):45-46,55. |
| |
| 作者姓名： | 吴建新 |
| |
| 作者单位： | 华中科技大学,电子与信息工程系,湖北,武汉,430074 |
| |
| 摘 要： | 该频率计基于电子设计(EDA)技术,实现了在一片现场可编程门阵列上的数字频率计的设计。该系统具有稳定可靠、抗干扰能力强和现场可编程等优点。
|
| 关 键 词： | 电子设计 VHDL语言 现场可编程门阵列 数字频率计 |
| 文章编号： | 1002-8684（2007）09-0045-02 |
| 修稿时间： | 2007-05-10 |
Realization on Cymometer Using Programmable Logic Device |
| |
| WU Jian-xin.Realization on Cymometer Using Programmable Logic Device[J].Audio Engineering,2007,31(9):45-46,55. |
| |
| Authors: | WU Jian-xin |
| |
| Institution: | Department of Electronics and Information Engineering, Huazhong University of Science and Technolgy, Wuhan 430074, China |
| |
| Abstract: | A digital cymometer system based on EDA(Electronic Design Automation) technique is presented,which is realized in FPGA. Simulations demonstrate the system has great stability, reliability, and capabilities of anti-jamming and field-programming. |
| |
| Keywords: | EDA Verilog HDL FPGA digital cymometer |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
