A 3D SiC MOSFET with poly-silicon/SiC heterojunction diode |
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Authors: | Sheng-Long Ran Zhi-Yong Huang Sheng-Dong Hu Han Yang Jie Jiang Du Zhou |
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Affiliation: | Chongqing Engineering Laboratory of High Performance Integrated Circuits, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing 400044, China |
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Abstract: | A three-dimensional (3D) silicon-carbide (SiC) trench metal-oxide-semiconductor field-effect transistor (MOSFET) with a heterojunction diode (HJD-TMOS) is proposed and studied in this work. The SiC MOSFET is characterized by an HJD which is partially embedded on one side of the gate. When the device is in the turn-on state, the body parasitic diode can be effectively controlled by the embedded HJD, the switching loss thus decreases for the device. Moreover, a highly-doped P+ layer is encircled the gate oxide on the same side as the HJD and under the gate oxide, which is used to lighten the electric field concentration and improve the reliability of gate oxide layer. Physical mechanism for the HJD-TMOS is analyzed. Comparing with the conventional device with the same level of on-resistance, the breakdown voltage of the HJD-TMOS is improved by 23.4%, and the miller charge and the switching loss decrease by 43.2% and 48.6%, respectively. |
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Keywords: | heterojunction diode SiC MOSFET switching loss on-state resistance |
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