DVB-S2中LDPC码编码器的FPGA设计与实现

介绍了一种用FPGA实现DVB—S2中LDPC码编码器的设计方法。设计采用RAM组和FIFO组配合使用操作的方法，有效地解决了枝验矩阵的存储和校验位的生成等难点问题，使得LDPC码的编码得以完成。用Verilog语言实现了DVB—S2的编码器，得到的FPGA综合报告表明，在占用硬件资源不大的条件下，编码器符合DVB—S2标准的要求，能够被标准所运用。

FPGA Design and Implement of LDPC Code Encoder in the DVB-S2

This paper introduces a design method of LDPC code encoder in the DVB - S2 using FPGA. The design method adopting group RAM and group FIFO cooperate and using the working technique, have solved difficult point problems such as the storage of check matrix and formulation of check bit etc. effectively, made the code of LDPC code be accomplished. The design of the encoder of DVB - $2 put forward in the article using Verilog language to get after writing in FPGA report shows that under the terms of taking up not much hardware resources, the encoder accords with the demands for DVB - S2 standard and can be used by the standard.