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基于WO_x阻变材料的RRAM电路设计
引用本文:于杰,张文俊,焦斌.基于WO_x阻变材料的RRAM电路设计[J].固体电子学研究与进展,2013,33(2):169-174.
作者姓名:于杰  张文俊  焦斌
作者单位:清华大学微电子学研究所,北京,100084
基金项目:国家高新技术研究发展计划(863计划)资助项目
摘    要:采用HHNEC0.18μm标准CMOS工艺设计实现了多个1kb容量的阻变存储器电路。针对WOx阻变材料的操作特点,提出了可切换的写电路以及自调节的读参考电路,满足了单极(Unipolar)与双极(Bipolar)兼容操作需求的同时提高了读操作的成功率。引入位线限流模块解决了置位(set)过程需要字线限流的问题,进而可以实现包含‘0’和‘1’多位数据的并行写入。芯片采用高低两种电压设计,同时包含多种阵列尺寸结构的对比测试电路。

关 键 词:阻变存储器  WOx  可切换写电路  自调节读参考电路  位线限流模块

RRAM Circuit Design Based on WOx Resistance Change Materials
YU Jie , ZHANG Wenjun , JIAO Bin.RRAM Circuit Design Based on WOx Resistance Change Materials[J].Research & Progress of Solid State Electronics,2013,33(2):169-174.
Authors:YU Jie  ZHANG Wenjun  JIAO Bin
Institution:(The Institute of Microelectronics of Tsinghua University,Beijing,100084,CHN)
Abstract:Multi-1 kb resistive random access memory(RRAM) chips are demonstrated in HHNEC 0.18 μm CMOS logic process.According to the operating characteristics of the WOx material,polarity-switching write circuit(PSWC) and the self-adjusting read reference circuit(SARC) are proposed.Unipolar and Bipolar compatible operation is achieved while improving the success rate of the read operation.Bit-line current limiter is introduced to solve the problem that Word-Line requires the word-line current limiting in set mode,and thus ’0’ and ’1’ multi-bits of data parallel-writing can be achieved.The chip is designed for high and low voltage,and contains comparison test circuit with a variety of array size structure.
Keywords:RRAM  WOx  PSWC  SARC  bit-line current limiter
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