| Optical Implementation of Bit-slice Full Adder by Using a Single Electron Trapping Device |
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| 引用本文： | RUAN Hao, CHENG Shuchun, GAN Fuxi(Shanghai Institute of Optics and Fine Mechanics,Chinese Academy of Sciences,P. O. for 800-211,Shanghai 201800,China). Optical Implementation of Bit-slice Full Adder by Using a Single Electron Trapping Device[J]. Chinese Journal of Lasers, 1997, 6(5): 467-472 |
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| 作者姓名： | RUAN Hao CHENG Shuchun GAN Fuxi(Shanghai Institute of Optics and Fine Mechanics Chinese Academy of Sciences P. O. for 800-211 Shanghai 201800 China) |
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| 作者单位： | Shanghai Institute of Optics and Fine Mechanics，Chinese Academy of Sciences，P. O. for 800-211，Shanghai 201800，China |
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| 基金项目： | Supported by the National Natural Science Foundation of China. |
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| 摘 要： | 1.IntroductionDuringpastdecades,therehavebeenmanyproposalsforimplementingopticalParallelbinarylogicalprocuring.Thesemethodsmaybedividedintotwocategoriesaccordingtothenonlinearityintheprocessingsteps[1].(i)LinearencodingofinputvariablesandlogicoperationsarePerformedbymeansofnonlinearopticaldevices,suchasSSEEDslz].(n)NonlinearspatialencodingofvariablesandlogicoperationsPerformedbylinearopticalsystems,suchaspolarizationencodinginanimagingsystem['J,spatialcellcodinginashadow-castingsystem[4),t…
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| 收稿时间： | 1996-11-15 |
Optical Implementation of Bit-slice Full Adder by Using a Single Electron Trapping Device |
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| RUAN Hao, CHENG Shuchun, GAN Fuxi. Optical Implementation of Bit-slice Full Adder by Using a Single Electron Trapping Device[J]. 中国激光(英文版), 1997, 6(5): 467-472 |
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| Authors: | RUAN Hao CHENG Shuchun GAN Fuxi |
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| Abstract: | Time-domain encoding technique is proposed for implementing bit-slicefull adder by using a single electron trapping (ET) device. For constructing bit-slice fulladder, a triple-in binary logic processor is proposed to Perform sum and carry operations. Based on the storage and erasable characteristics of the device, the logic operationsof three input binary patterns can be generated by performing a series of unit operationsin a definite sequence. Both application examples and experimental results are given. |
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| Keywords: | bit-slice full adder triple-in binary logic electron trapping materials |
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