A novel heuristic for multi-objective optimization of analog circuit performances

We present a novel heuristic for optimizing analog circuit performances. It deals with generating the Pareto front using the topological properties of the feasible solution space. This heuristic allows us generating optimal values of circuit parameters in reduced computation time and memory consumption. Unlike basic metaheuristics, it does not need optimization background from the user in order to be easily adapted to different applications. It can thus be smoothly integrated into an automated design flow. This novel approach enables us to further improve (good) performances that were already reached using other optimizing techniques. Robustness of the algorithm was proved using specific difficult test problems.