A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device |
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Authors: | Hu Sheng-Dong Zhang Bo Li Zhao-Ji and Luo Xiao-Rong |
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Institution: | State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China,Chengdu 610054, China |
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Abstract: | A new partial-SOI (PSOI) high voltage device structure
called a CI PSOI (charge island PSOI) is proposed for the first time
in this paper. The device is characterized by a charge island layer
on the interface of the top silicon layer and the dielectric buried layer in
which a series of equidistant high concentration n+-regions
is inserted. Inversion holes resulting from the vertical electric field
are located in the spacing between two neighbouring n+-regions
on the interface by the force with ionized donors in the
undepleted n+-regions, and therefore effectively enhance the
electric field of the dielectric buried layer (EI) and increase
the breakdown voltage (BV), thereby alleviating the self-heating effect
(SHE) by the silicon window under the source. An analytical model of
the vertical interface electric field for the CI PSOI is presented
and the analytical results are in good agreement with the 2D
simulation results. The BV and EI of the CI PSOI LDMOS increase to
631~V and 584~V/μ m from 246~V and 85.8~V/μ m for the
conventional PSOI with a lower SHE, respectively. The effects of the
structure parameters on the device characteristics are analysed for the
proposed device in detail. |
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Keywords: | interface charges breakdown voltage partial-SOI self-heating effect |
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