Integration, processing and performance of low power thermally tunable CMOS-SOI WDM resonators

Ring waveguide resonating structures with high quality factors represent a key component in silicon photonic links. We demonstrate experimentally and validate numerically spectral tuning with a high efficiency of photonic ring structures when manufactured in a commercial 130?nm SOI CMOS technology with localized removal of back-side substrate using silicon micromachining methods. A comprehensive analysis is reported on the thermal tuning efficiency of tunable ring devices as a function of the ring’s size, type of thermal tuner and amount of back- and front-side post-CMOS micromachining. We further propose a path to maintain a high tuning efficiency of photonic devices with partially or completely removed SOI silicon substrate upon their hybridization to electronic driver chips. Such a platform opens up additional options for increased on-chip system functionality and dense integration in 3-D.