基于FPGA的高速并行A/D采样控制电路的设计 |
| |
引用本文: | 杨守良.基于FPGA的高速并行A/D采样控制电路的设计[J].渝西学院学报(自然科学版),2006(4). |
| |
作者姓名: | 杨守良 |
| |
作者单位: | 重庆文理学院物理与信息工程系 重庆永川402160 |
| |
摘 要: | 给出了一种基于FPGA的高速并行A/D采样控制电路的设计方法.该电路能与各种单片机系统进行友好连接,能够实现高速A/D采集转换和转换后的数据存取.文中以ADC0809为例,详细介绍了含有FIFO存储器的A/D采样控制电路的设计方法,并给出了A/D采样控制电路的VHDL源程序和整个采样存储的顶层电路原理图.
|
关 键 词: | FPGA ADC0809 控制电路 设计方法 |
The Design of the A/D Sampling Control Circuit Basing on the High Speed Simultaneous FPGA |
| |
Authors: | YANG Shou-liang |
| |
Abstract: | The author introduces a kind of designing method of the A/D Sampling Control Circuit basing on the high speed simultaneous FPGA.The circuit can be joined well with all kinds of single-chip computer systems,which can gather and transform the data of A/D at a speed and perform the data access after the conversion as well.Taking ADC0809 as an example in the article,the author explained the designing method of the A/D Sampling Control circuit which includes FIFO memorizer particularly.And the author also presents the VHDL source program of the A/D Sampling Control Circuit and the top level circuit schematic drawing of the entire sampling memorizer. |
| |
Keywords: | FPGA ADC0809 controling circuit Designing method |
本文献已被 CNKI 等数据库收录! |