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嵌入式高速ADC的最新研究进展
引用本文:邓青,陈珍海,朱燕君,吴俊.嵌入式高速ADC的最新研究进展[J].电子与封装,2009,9(7):42-45,48.
作者姓名:邓青  陈珍海  朱燕君  吴俊
作者单位:1. 中国电子科技集团公司第十四研究所,南京,210013
2. 中国电子科技集团公司第五十八研究所,无锡,214035
摘    要:随着数字化程度的不断深入,系统级芯片(SoC)已成为当前发展主流,系统芯片对高速高精度嵌入式ADC的需求日益迫切。CMOS工艺尺寸的等比例缩小为ADC速度的提高提供了条件,但是对实现ADC高信噪比的限制越来越大。文章首先讨论了CMOS工艺尺寸的不断等比例缩小对ADC性能的影响,其次讨论了采用数字电路进行纠错补偿、省略运算跨导放大器(OTA)使用以及采用电流域信号处理技术等适用于嵌入式高速ADC设计的最新技术进展。

关 键 词:高速模数转换器  嵌入式  流水线  逐次逼近  电流模

Latest Development in Embedded High Speed ADC
DENG Qing,CHEN Zhen-hai,ZHU Yan-jun,WU Jun.Latest Development in Embedded High Speed ADC[J].Electronics & Packaging,2009,9(7):42-45,48.
Authors:DENG Qing  CHEN Zhen-hai  ZHU Yan-jun  WU Jun
Institution:DENG Qing1,CHEN Zhen-hai2,ZHU Yan-jun2,WU Jun2 (1.China Electronic Technology Group Corporation,No.14 Research Institute,Nanjing 210013,China,2.China Electronic Technology Group Corporation,No.58 Research Institute,Wuxi 214035,China)
Abstract:With the continual development of digitalization, SoC has been the design trends of syetem design. Technology scaling has enabled an increased conversion rate; however, it now also leads to difficulties with the SNR. The impact of CMOS technology scaling in analog to digital converters (ADC) is discussed in this paper. The latest design technologies in emedded high speed ADC design, such as digital assisted ADC, ADC without OTA, and current-domain signal pocessing are also introduced.
Keywords:high speed ADC  embedded  pipeline  SAR  current-mode  
本文献已被 CNKI 维普 万方数据 等数据库收录!
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